SoC Design Engineer for Next-Gen SSDs

Solidigm Inc.; California (MO); On-site; USD 148,000 - 237,000; Full time

Job summary

Solidigm Inc. in Rancho Cordova, California, is seeking an ASIC development engineer to design, verify, and document SoCs for SSDs. You will collaborate with multi-disciplinary teams and drive innovative solutions.

The role requires advanced digital logic design skills, strong debugging abilities, and experience with UVM/FPV verification methods. You’ll contribute to the full design flow and stay at the cutting edge of semiconductor development.

Qualifications

• Bachelor’s degree required in EE, CE, CS, or equivalent
• Experience with RTL design and verification in ASIC/SoC environments
• Proficiency in C/C++, Python, Java, Verilog or SystemVerilog
• Familiarity with UVM and FPV verification approaches
• Knowledge of RTL design flow and formal verification concepts

Responsibilities

• Perform logic design and/or verification for functional units and sub-systems in SoC IP or full chip designs
• Perform RTL design and simulation for SoCs using industry-standard methodologies
• Develop and review test and execution plans to ensure product success
• Use verification methodologies such as UVM, FW co-simulation, formal property verification
• Contribute to multidimensional designs involving the layout of complex ICs
• Perform all aspects of the SoC design flow from high-level design to place-and-route, timing and power
• Continuously investigate new tools and technologies

Skills

Excellent written and verbal comms

Teamwork

Digital logic design

Stakeholder engagement

Time management

Decision making

Risk identification

Project presentation

Active listening

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent

Tools

UVM

FPV

SystemVerilog

Job description

Solidigm Inc. in Rancho Cordova, California, is seeking an ASIC development engineer to design, verify, and document SoCs for SSDs. You will collaborate with multi-disciplinary teams and drive innovative solutions.

The role requires advanced digital logic design skills, strong debugging abilities, and experience with UVM/FPV verification methods. You’ll contribute to the full design flow and stay at the cutting edge of semiconductor development.