SoC Design Engineer: Architect & Integrate Subsystems

Capgemini; Atlanta (GA); On-site; USD 73,000 - 174,000; Full time

Job summary

Capgemini Engineering is seeking a talented SoC Design Engineer to own architecture, integration, and implementation of complex SoC subsystems. You will work with cross-functional teams to deliver high-performance, power-efficient solutions for advanced semiconductor designs.

You will define architecture specs, integrate processors, memory, and high-speed interfaces, and drive timing, power, and implementation flows from IP selection to silicon readiness.

Qualifications

• Master's degree in Electrical Engineering or related field.
• 4+ years of experience in SoC integration, design, or related semiconductor engineering roles.
• Experience integrating complex SoC subsystems such as processors, PCIe, DDR, or similar technologies.
• Proficiency with RTL design methodologies and HDL including Verilog, SystemVerilog, or VHDL.
• Experience developing and maintaining CDC, RDC, linting, synthesis, and power analysis flows.
• Strong scripting and automation skills using Tcl and Python.
• Excellent verbal and written communication across global teams.

Responsibilities

• Define and document architecture specifications for SoC subsystems and contribute to overall chip architecture decisions.
• Integrate complex subsystems at the SoC level, including processors, memory, and high-speed interfaces.
• Collaborate with IP vendors and internal stakeholders to select and configure IP solutions.
• Develop and maintain timing, power, and quality methodologies, including SDC constraints, UPF implementation, CDC/RDC analysis, and linting flows.
• Analyze power, performance, and area results and drive design optimizations to meet objectives.
• Partner with synthesis, DFT, and physical design teams to resolve timing, power, and implementation challenges.
• Support PCB design and system integration activities to ensure successful product development.

Skills

Verilog

SystemVerilog

VHDL

Synthesis

Power analysis

UPF

CDC/RDC

SDC constraints

Tcl scripting

Python scripting

DFT

ARM Cortex integration

GPU integration

RTL design

RTL-to-GDS flows

Education

Master's degree in Electrical Engineering

Tools

VCS

Verdi

SpyGlass

Design Compiler

RTL Architect

Job description

Capgemini Engineering is seeking a talented SoC Design Engineer to own architecture, integration, and implementation of complex SoC subsystems. You will work with cross-functional teams to deliver high-performance, power-efficient solutions for advanced semiconductor designs.

You will define architecture specs, integrate processors, memory, and high-speed interfaces, and drive timing, power, and implementation flows from IP selection to silicon readiness.