SoC Design Lead Engineer

ScaleFlux, Inc.; Milpitas (CA); On-site; USD 210,000 - 280,000; Full time

Job summary

ScaleFlux, Inc. is seeking a SoC Design Lead Engineer to join our high-performance data center hardware team. You will define micro-architecture for multi-core ARM SOCs, integrate IPs, and lead RTL implementation and verification efforts while collaborating with cross-functional teams.

The ideal candidate has 10+ years in Electrical/Electronic/VLSI engineering, deep ARM v8/v9 expertise, and strong leadership skills to guide the design effort across AMBA interfaces and complex bus interconnects.

Qualifications

• Minimum BE/BS in Electrical/Electronic Engineering or VLSI; Masters preferred.
• Expertise in ARM v8/v9 and multi-core SOC architecture.
• Experience with ARM ecosystem components and AMBA protocols.
• Strong Verilog/SystemVerilog and RTL verification knowledge.
• Excellent communication and leadership to guide a design team.

Responsibilities

• Contribute to SoC architecture for a multi-core ARM SOC.
• Define SoC micro-architecture and design.
• Integrate IPs and ensure RTL implementation and verification.
• Collaborate with verification and hardware teams for IP integration.
• Lead design reviews and RTL debugging.
• Assist emulation, FPGA, and prototyping efforts.

Skills

ARM v8/v9

SoC design lead

RTL design

Verilog/SV

AMBA protocols

Cross-functional leadership

Low power design

Education

BE/BS in EE/VLSI

Job description

We are looking for SoC Design Lead Engineer to join our rapidly growing design team focused on high performance data center infrastructure SOC development. The ideal candidate for this role shares our passion for creating innovative technologies, and thrives in a highly dynamic, fast-paced, result-driven environment. We are looking for highly talented, passionate, and versatile engineers that can create the next generation enterprise data center solutions.

Responsibilities

• Contribute to SoC architecture for a multi-core ARM SOC
• Define SoC micro architecture and design
• Build SoC around key ARM subsystem components and other IPs including various interfaces
• Design of clock-reset architecture and RTL implementation
• Integration of all IPs into SoC
• Work with verification team for complete SoC verification, review test plans
• RTL Simulation and debug
• Assist in emulation, FPGA, prototyping effort

Qualifications

Required:

• Minimum BE/BS degree (Masters preferred) in Electrical/Electronic Engineering/VLSI with10+ years of practical experience
• Expertise in ARM v8 and v9 specifications and their impact to SoC system architecture
• Multiple project experience with ARM based ecosystem components (A-series ARM Cores, SMMU, GIC, Core sight, NIC and other complex bus interconnects)
• Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC designs
• Exposure to ARM platform architecture specifications
• Strong experience with Verilog, System Verilog, DC/DC-T based synthesis, constraints development and RTL level checks. Low power methodology knowledge will be a plus.
• Understanding of major SOC interfaces like PCIE, DRAM, Flash, I2C, SSP, UART.
• Capable of working with multiple IP vendors and other teams
• Excellent communication and leadership quality to lead design team