SMTS Product Architect

Micron Technology; San Jose (CA); On-site; USD 177,000 - 387,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Income protection

Paid family leave

Robust paid time-off program

Paid holidays

Job summary

Micron Technology is seeking a CMBU Product Architecture Engineer for DRAM based in San Jose, California. In this role, you will guide Micron’s DRAM strategy by collaborating with industry architects and researchers to optimize AI workloads. The ideal candidate will possess a Bachelor's degree in Electrical Engineering and at least 12 years of engineering experience, focusing on memory architectures. The company offers a competitive salary range from $177,000 to $387,000 per year, as well as comprehensive benefits including medical, dental, and paid family leave.

Qualifications

• 12+ years of engineering experience required.
• Familiarity with LPDDR and/or DRAM module architectures.
• Understanding of memory hierarchy and design methodologies.

Responsibilities

• Explore and analyze system architectures using modeling tools.
• Identify system bottlenecks and propose solutions.
• Lead pathfinding efforts for LPDDR and DRAM architectures.

Skills

Engineering experience

System architecture analysis

Mentoring

Education

Bachelor’s degree in Electrical Engineering

Tools

Modeling and simulation tools

Prototyping tools

Job description

As a CMBU Product Architecture Engineer for DRAM at Micron Technology, you will help guide Micron’s DRAM strategy for AI training and inference. You’ll work closely with industry architects, researchers, and ecosystem partners to uncover bottlenecks, influence design choices, and define new product concepts. Inside Micron, you’ll collaborate with leading R&D, design, and product teams to turn ideas into solutions that move the industry forward.

Responsibilities

• Explore and analyze system architectures using modeling, simulation, and prototyping tools
• Identify system bottlenecks with customers and partners and propose innovative solutions
• Lead pathfinding efforts for architectures using LPDDR and DRAM module technologies
• Define memory features that increase DRAM value in AI workloads
• Mentor junior system architects and engineers

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering
• 12+ years of engineering experience
• Familiarity with LPDDR and/or DRAM module architectures
• Understanding of memory hierarchy, controllers, PHY, and custom SoC/ASIC design
• Experience with TSV, stacked packaging, or 3D packaging technologies

Preferred Qualifications

• Knowledge of memory subsystems in high‑performance computing
• Exposure to HW/SW co‑optimization or regenerative AI frameworks
• Experience participating in JEDEC or other specification‑setting activities

Salary

US base salary range: $177,000.00 - $387,000.00 a year.

Additional compensation may include benefits, bonuses and equity.

Benefits

Micron offers medical, dental, and vision plans; income protection; paid family leave; a robust paid time‑off program; and paid holidays. Benefit programs are available on micron.com/careers/benefits.

EEO Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.