SMTS Product Architect

Micron Technology; Folsom (CA); On-site; USD 177,000 - 387,000; Full time

Benefits offered by this job

Medical plans

Dental plans

Vision plans

Paid family leave

Robust paid time-off program

Paid holidays

Job summary

Micron Technology is seeking a CMBU Product Architecture Engineer for DRAM in Folsom, California. This role focuses on guiding DRAM strategies for AI, collaborating closely with industry architects and leading R&D teams. Candidates should have a Bachelor’s in Electrical Engineering and 12+ years of experience. Responsibilities include analyzing system architectures and defining memory features to enhance DRAM value in AI workloads. A robust compensation package is offered, including benefits and paid time off.

Qualifications

• 12+ years of engineering experience.
• Familiarity with LPDDR and/or DRAM module architectures.
• Experience with TSV, stacked packaging, or 3D packaging technologies.

Responsibilities

• Explore and analyze system architectures using modeling, simulation, and prototyping tools.
• Identify system bottlenecks and propose innovative solutions.
• Lead pathfinding efforts for architectures using LPDDR and DRAM module technologies.

Skills

Electrical Engineering

System Architecture Analysis

LPDDR/DRAM Familiarity

Memory Hierarchy Understanding

3D Packaging Technologies

Education

Bachelor’s degree in Electrical Engineering

Job description

As a CMBU Product Architecture Engineer for DRAM at Micron Technology, you will help guide Micron’s DRAM strategy for AI training and inference. You’ll work closely with industry architects, researchers, and ecosystem partners to uncover bottlenecks, influence design choices, and define new product concepts. Inside Micron, you’ll collaborate with leading R&D, design, and product teams to turn ideas into solutions that move the industry forward.

Responsibilities

• Explore and analyze system architectures using modeling, simulation, and prototyping tools
• Identify system bottlenecks with customers and partners and propose innovative solutions
• Lead pathfinding efforts for architectures using LPDDR and DRAM module technologies
• Define memory features that increase DRAM value in AI workloads
• Mentor junior system architects and engineers

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering
• 12+ years of engineering experience
• Familiarity with LPDDR and/or DRAM module architectures
• Understanding of memory hierarchy, controllers, PHY, and custom SoC/ASIC design
• Experience with TSV, stacked packaging, or 3D packaging technologies

Preferred Qualifications

• Knowledge of memory subsystems in high‑performance computing
• Exposure to HW/SW co‑optimization or regenerative AI frameworks
• Experience participating in JEDEC or other specification‑setting activities

Salary

US base salary range: $177,000.00 - $387,000.00 a year.

Additional compensation may include benefits, bonuses and equity.

Benefits

Micron offers medical, dental, and vision plans; income protection; paid family leave; a robust paid time‑off program; and paid holidays. Benefit programs are available on micron.com/careers/benefits.

EEO Statement

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.