Silicon Verification Engineer — Remote-Friendly AI Compute

MatX Inc.

Mountain View (CA)

Hybrid

USD 250,000 - 600,000

Full time

14 days+

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Benefits offered by this job

4 weeks PTO
Holidays
Up to 3 weeks remote work
Medical insurance (employee & depend)

Job summary

MatX is building silicon for high-performance AI, seeking verification engineers to deliver efficient and correct silicon for compute, memory, and high-speed connectivity. You will contribute to verification methodology, own portions of verification, and create testbenches and tests to reach coverage, planning reviews toward design freezes and tapeouts.

Proficiency in SystemVerilog, Python, C/C++, Bluespec, UVM/ABV and post-silicon debug is required; emulation and prototyping experience is a

Qualifications

  • Concept-to-silicon verification experience required.
  • Experience with SystemVerilog, Python, C/C++, Bluespec for verification.
  • Production experience with UVM and ABV; formal and simulated verification.
  • Production experience creating portable tests and drivers for verification.
  • Strong understanding of silicon micro-architecture for high-performance compute.
  • Familiarity with emulation and prototyping platforms is a plus.
  • Hands-on experience with silicon bring-up is a plus.

Responsibilities

  • Contribute to verification methodology with a scalable solution across blocks, subsystems, fullchip and system-level validation.
  • Own portions of verification execution at subsystem and chip-level and create testbenches, tests and related artifacts to achieve structural and functional coverage closure.
  • Plan and drive intermediate and sign-off reviews on verification test plans, execution progress and verification closure towards milestones including design freeze and tapeout.

Skills

SystemVerilog
Python
C/C++
Bluespec
UVM
ABV
formal verification
post-silicon debug

Tools

Emulation platforms
Prototyping platforms

Job description

MatX is building silicon for high-performance AI, seeking verification engineers to deliver efficient and correct silicon for compute, memory, and high-speed connectivity. You will contribute to verification methodology, own portions of verification, and create testbenches and tests to reach coverage, planning reviews toward design freezes and tapeouts.

Proficiency in SystemVerilog, Python, C/C++, Bluespec, UVM/ABV and post-silicon debug is required; emulation and prototyping experience is a

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