Silicon Validation Engineer, TPU

Google; Sunnyvale (CA); On-site; USD 113,000 - 161,000; Full time

Job summary

A leading technology company is seeking a skilled engineer to drive innovation in AI/ML hardware acceleration. This role focuses on developing and testing cutting-edge TPU technology, collaborating closely with cross-functional teams to ensure the performance and reliability of ASIC projects. The position offers a unique opportunity to contribute to the future of hyperscale computing, with a strong emphasis on computer architecture and semiconductor experience.

Benefits

Bonus

Equity

Benefits

Qualifications

• 2 years of experience with C++ or Python software design principles.
• Experience with reading hardware description languages and chip design flow.

Responsibilities

• Develop and execute test plans for functional and performance validation.
• Collaborate with design and software developers for ASIC lifecycle.
• Implement test plans by developing software tests for system validation.

Skills

Python

C++

Computer architecture

Semiconductor experience

Test automation

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Tools

SystemVerilog

Job description

Minimum qualifications:

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

+ Experience scripting in Python or equivalent programming language.

+ Computer architecture or semiconductor experience.

Preferred qualifications:

+ Master's degree in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

+ 2 years of experience with C++ or Python software design principles.

+ Experience with reading hardware description languages (e.g., SystemVerilog) and chip design flow.

+ Experience building test automation tools and scripts.

+ Passion for computer architectures.

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will work on the test design, bring-up, triage, and debug of TPU subsystems. You will develop and execute test plans for functional and performance validation. You will work closely with design, implementation, design verification, software developers, and emulation prototyping in the development phase of the ASIC life-cycle, ensuring proper features are in place for post-silicon validation and debug. You will collaborate with system software and software test infrastructure developers to ensure we have proper ASIC test coverage for an entire program. You will help to create and drive testing of our integrated systems with a focus on ASIC functional test verification and characterization.

You will help develop a common set of requirements, processes, and tests to ensure smooth and reliable performance of ASIC projects. You will work throughout the entire project life-cycle, from early pre-silicon planning and test development, through end-of-life characterization and failure debug. By leveraging hardware knowledge you will develop and operate software-based tests for full investigation of ASIC operation.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

The US base salary range for this full-time position is $113,000-$161,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google (https://careers.google.com/benefits/) .

+ Develop detailed silicon test plans, based on design specifications and coordination with a cross-functional silicon team (architecture, design, software, firmware) for Google's Tensor Processing Units.

+ Implement test plans by developing software tests and flows for system validation and verification, then utilize it all to collect data and characterize the operation of high bandwidth memory in test chips and production silicon.

+ Triage and debug issues found during new product development and find solutions.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.