Silicon Validation Engineer: Pre & Post Emulation

Meta; Menlo Park (CA); On-site; USD 146,000 - 209,000; Full time

Job summary

Meta seeks an experienced Silicon Validation Engineer to drive end-to-end validation of custom infrastructure silicon, from pre-silicon input to production fleet deployment. You will own strategies, emulation bring-up, and cross-team debugging across HW, FW, and SW layers.

You’ll define test plans, develop emulation infra, and lead validation initiatives to ensure reliable, scalable silicon delivery for data center workloads.

Qualifications

• Bachelor's degree in CS/CE or equivalent.
• 6+ years of ASIC/SoC validation across pre- and post-silicon cycles.
• Experience debugging silicon products with waveform viewers and analyzers.
• Experience with ASIC design, emulation, and post-silicon validation.
• Automation scripting in Python and C/C++.
• Collaborates across RTL, firmware, software, and systems teams.

Responsibilities

• Validate silicon across full lifecycle from pre-silicon input to post-silicon fleet deployment.
• Define silicon validation strategies, plans, coverage, and regression frameworks.
• Develop emulation infrastructure including FPGA-based bring-up and configuration.
• Partition RTL onto emulation platforms and optimize timing and debug visibility.
• Build automation for validation workflows and performance analysis.
• Debug hardware, firmware, and software interactions across layers.
• Root-cause and remediate silicon issues and ensure smooth transitions to lab/data center bring-up.
• Lead end-to-end validation and provide guidance on methodology and tools.

Skills

ASIC validation

Emulation/FPGA

Python

C/C++

RTL knowledge

Debugging HW/SW

Education

Bachelor's degree in CS/CE or equivalent

Tools

Palladium

Veloce

Zebu

SystemVerilog tools

Job description

Meta seeks an experienced Silicon Validation Engineer to drive end-to-end validation of custom infrastructure silicon, from pre-silicon input to production fleet deployment. You will own strategies, emulation bring-up, and cross-team debugging across HW, FW, and SW layers.

You’ll define test plans, develop emulation infra, and lead validation initiatives to ensure reliable, scalable silicon delivery for data center workloads.