Senior Infra Silicon Validation Lead

Meta; Sunnyvale (CA); On-site; USD 212,000 - 294,000; Full time

Benefits offered by this job

Bonus

Equity

Benefits

Job summary

Meta's Infrastructure Silicon organization seeks a Technical Lead for Silicon Validation to own pre-silicon and post-silicon bring-up, validation, and qualification for data center ASICs. You will define validation strategies, drive scalable frameworks, collaborate with design and systems teams, and mentor engineers to elevate silicon debugging and automation.

This role emphasizes delivering reliable, high-performance silicon for Meta's data center fleet, with opportunities to shape long-term

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, or equivalent practical experience.
• 12+ years of ASIC pre- and post-silicon validation experience.
• 12+ years of silicon debug, failure analysis, and root-cause methodologies across simulation, emulation, and physical silicon environments.
• Experience defining and leading organization-wide validation strategy, coverage planning, and test automation architecture for complex ASIC programs.
• Experience with Python, C, or C++ for developing validation frameworks, diagnostic tools, and test automation infrastructure.
• Experience collaborating across ASIC design, architecture, systems engineering, and external partners throughout the silicon development lifecycle.

Responsibilities

• Own and lead pre-silicon and post-silicon bring-up, validation, and qualification activities across the full product lifecycle, from test planning and emulation through characterization and fleet deployment
• Architect and drive development of scalable validation frameworks, diagnostic toolsets, and automation infrastructure targeting custom infrastructure ASICs
• Lead root-cause analysis and resolution of complex silicon failures across pre-silicon simulation, emulation, and post-silicon environments, driving systematic debug methodologies across teams
• Provide technical direction on validation coverage, test content prioritization, and silicon readiness criteria to ensure successful tape-out and productization milestones
• Collaborate with ASIC design, architecture, and systems engineering teams to influence next-generation silicon design decisions based on validation findings and fleet production insights
• Establish and enforce validation best practices, coverage metrics, and quality gates across the silicon development organization
• Drive technical alignment across internal and external partners, including foundry, IP vendors, and platform teams, to resolve silicon-level issues and accelerate bring-up timelines
• Mentor and provide technical guidance to other engineers across the validation organization, elevating team-wide capability in silicon debug, test automation, and characterization
• Translate production fleet data and system-level use cases into actionable validation requirements and regression coverage improvements
• Define long-term roadmaps for validation infrastructure and tooling to support Meta's growing portfolio of custom data center silicon

Skills

ASIC validation

Python

C/C++

Validation strategy

Debugging

Emulation

Team leadership

Education

Bachelor's degree in Computer Science/Engineering

Tools

Python

C

C++

Job description

Meta's Infrastructure Silicon organization seeks a Technical Lead for Silicon Validation to own pre-silicon and post-silicon bring-up, validation, and qualification for data center ASICs. You will define validation strategies, drive scalable frameworks, collaborate with design and systems teams, and mentor engineers to elevate silicon debugging and automation.

This role emphasizes delivering reliable, high-performance silicon for Meta's data center fleet, with opportunities to shape long-term