Silicon Program Leader — Multi-Die Tape-Out

Amazon Inc.

San Diego (CA)

Presencial

USD 204.000 - 275.000

Jornada completa

Hace 7 días
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Descripción de la vacante

Amazon's Annapurna Labs is seeking a Principal Technical Program Manager to own end-to-end program execution for the ML accelerator chip, from RTL freeze through tape-out and into production readiness. You will connect a sprawling set of engineering workstreams into a single coherent schedule and drive cross-functional decisions to keep the program on track.

You will lead multiple silicon development efforts with deep interdependencies across engineering disciplines and external partners,

Formación

  • 10+ years of hands-on experience managing complex technology programs.
  • Experience working directly with engineering teams across multiple disciplines.
  • Deep knowledge of the chip development lifecycle: RTL verification milestones, physical design convergence, DFT, and timing closure.

Responsabilidades

  • Own the integrated schedule and critical path analysis across multiple die tape-outs through engineering samples and production ramp.
  • Drive the weekly chip status cadence by synthesizing inputs from RTL/DV, physical design, packaging, power, infrastructure, and post-silicon teams into a single view for leadership.
  • Track verification convergence as a leading indicator by monitoring feature completion, RTL closure, bug trends, and regression pass rates by block.
  • Manage the external design partner interface, owning the netlist delivery calendar and negotiating schedule trades.
  • Drive infrastructure readiness and external IP delivery by partnering with compute and EDA platform teams on capacity planning and tracking third-party IP deliveries.

Conocimientos

Program management
Cross-functional leadership
Engineering leadership
Schedule reliability
Risk assessment

Descripción del empleo

Amazon's Annapurna Labs is seeking a Principal Technical Program Manager to own end-to-end program execution for the ML accelerator chip, from RTL freeze through tape-out and into production readiness. You will connect a sprawling set of engineering workstreams into a single coherent schedule and drive cross-functional decisions to keep the program on track.

You will lead multiple silicon development efforts with deep interdependencies across engineering disciplines and external partners,

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