Silicon Engineer

Cognichip; Redwood City (CA); Hybrid; USD 100,000 - 140,000; Full time

Job summary

A leading AI startup in Redwood City seeks a Silicon Engineer to redefine chip design using machine learning. In this hybrid role, you will work on creating the foundational blocks of automated design flow and collaborate with a team of experts. Ideal candidates will possess a relevant degree and strong skills in chip expertise and Python. Proficiency in hardware description languages is also required for this exciting opportunity to innovate in a fast-growing research environment.

Qualifications

• Strong academic record in digital logic design and computer architecture.
• Hands‑on exposure to hardware description languages.
• Excellent communication to convey chip knowledge.

Responsibilities

• Encode chip design expertise into knowledge bases and playbooks.
• Define how agents invoke EDA tools including result interpretation.
• Implement end-to-end agent workflows for chip design and verification.

Skills

Chip design expertise

Python proficiency

Communication skills

Curiosity and proactive learning

Education

Bachelor’s or Masters in Computer Science, Computer or Electrical Engineering, or related field

Tools

SystemVerilog

Verilog

VHDL

Job description

At Cognichip, we’re not just building Artificial Intelligence - we’re redefining what’s possible at the nexus of silicon design and machine learning. As a Silicon Engineer, you will be the hands‑on builder, fusing chip design expertise with ML to create the foundational blocks of our autonomous design flow.

In this role, you won’t just design chips, you will create the libraries, IP and benchmarks that teach our AI how to design chips. You will work alongside a cross‑functional team of world‑class engineers and researchers to translate hardware logic into artificial chip intelligence.

What You’ll Do

• Encode chip‑design expertise (RTL/DV best practices, common microarchitectural patterns, and known failure modes) into reusable, agent‑consumable knowledge bases and playbooks
• Define how and when agents invoke EDA tools (simulation, lint, CDC, synthesis, STA), including result interpretation and chaining tools into reliable end‑to‑end design and verification flows
• Design and implement end‑to‑end agent workflows for chip design, verification, debugging, and iterative refinement using structured, hierarchical process graphs
• Decompose complex silicon design and verification tasks into clear, executable agent steps with well‑defined inputs, outputs, and success criteria
• Develop high‑quality prompts for each stage of the hardware lifecycle (specification, microarchitecture, RTL implementation, verification, and debug)

What You Bring

• Bachelor’s or Masters in Computer Science, Computer or Electrical Engineering, or a closely related field
• Strong academic record and relevant coursework in digital logic design, computer architecture, and embedded systems
• Hands‑on exposure to at least one hardware description language (SystemVerilog, Verilog or VHDL)
• Proficiency in Python for design, automation and data analysis
• Excellent written and verbal communication skills, especially to convey chip design knowledge to software engineers and AI scientists
• Strong curiosity, proactive approach to learning, and comfort working in a dynamic, research‑heavy AI‑oriented startup environment

Bonus Points

The following items are not required but are great bonuses:

• Personal projects showcasing innovation, creativity, and continuous learning
• Demonstrated coursework or project experience in machine learning and/or deep learning
• Knowledge of open‑source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)
• Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc)
• Experience with hands‑on debugging – simulators, waveform viewing, coverage collection

What It’s Like Here

We’re a fast‑moving AI startup with a collaborative, high‑trust culture. You’ll work with top‑tier engineers, scientists, and builders—solving hard problems that sit at the intersection of cloud computing, AI, and chip design. We value technical excellence, ownership, and the freedom to experiment. If you’re excited to build the future of engineering, you’ll feel right at home.

Logistics

This position is available in Redwood (HQ). We believe a mindmeld between engineers and scientists leads to our professional growth and to great products; we have a hybrid schedule with four days in office, one day remote. Note that we use AI during the recruitment process.