Staff Chip Engineer- Agentic Workflow

Yugal Tech Academy

Redwood City (CA)

On-site

USD 150,000 - 200,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

A cutting-edge AI startup in Redwood City is seeking a Staff Chip Engineer to architect AI-driven chip design workflows. The role involves building multi-agent systems and requires extensive software or chip engineering experience. Ideal candidates will have strong proficiency in Python and expertise in LLM orchestration frameworks. This unique position not only influences future chip design but also offers competitive compensation with substantial equity upside.

Qualifications

  • 6+ years of experience in software or chip engineering.
  • Proficiency in Python; experience with LLM orchestration frameworks.
  • Hands-on experience with vector databases.

Responsibilities

  • Design and implement multi-agent AI workflows automating chip design.
  • Build and maintain RAG pipelines with chip design knowledge bases.
  • Architect orchestration systems using LangGraph and LangChain.

Skills

Software or chip engineering experience
Proficiency in Python
LLM orchestration framework experience
Experience with vector databases
System design skills
Experience in EDA tools
Familiarity with cloud platforms

Job description

About Cognichip

Cognichip is a cutting-edge AI startup redefining how semiconductor chips are designed. Headquartered in Redwood City, California, the company is backed by some of the most respected investors in Silicon Valley. Cognichip’s mission is to use AI to dramatically accelerate chip design and verification cycles — reducing years of work into weeks through multi-agent autonomous systems. The company is at the intersection of Agentic AI and next-generation semiconductor engineering, and is one of the most exciting places to work at in the deep tech space in 2026.

Role Overview

As a Staff Chip Engineer specializing in Agentic Workflows, you will be a core member of Cognichip’s AI platform team. This is not a traditional chip design role — it sits directly at the intersection of advanced LLM-based automation and hardware engineering. You will architect, build, and deploy multi-agent pipelines that allow AI to autonomously execute complex design tasks: from RTL generation and verification to physical design optimization. Your work will directly shape how AI agents reason and collaborate within chip development workflows.

This role demands a rare, powerful combination of hardware engineering knowledge and modern AI systems expertise. You’ll work in a fast-paced, research-forward environment alongside some of the best engineers in the world, turning state-of-the-art research into production systems.

Key Responsibilities
  • Design and implement multi-agent AI workflows that automate complex chip design and verification pipelines end-to-end
  • Build and maintain RAG (Retrieval-Augmented Generation) pipelines leveraging domain-specific chip design knowledge bases and vector databases
  • Architect multi-agent orchestration systems using LangGraph, LangChain, AutoGen, and CrewAI
  • Develop and expose REST APIs and microservices that allow AI agents to interface with chip design EDA tools, simulators, and data stores
  • Collaborate directly with AI researchers and chip architects to translate design requirements into agentic task decompositions
  • Define and instrument evaluation metrics for agent reliability, correctness, and speed
  • Participate in code reviews, architecture decisions, and cross-functional planning sessions
  • Stay up-to-date with emerging Agentic AI research and integrate breakthroughs into the platform
  • Build automated testing frameworks to validate multi-agent workflows at scale
  • Contribute to the technical vision and product direction of the AI platform
Required Skills & Qualifications
  • 6+ years of experience in software or chip engineering
  • Proficiency in Python; experience with at least one LLM orchestration framework (LangChain, LangGraph, CrewAI, AutoGen)
  • Hands-on experience with vector databases (Pinecone, Weaviate, or Chroma)
  • Deep understanding of RAG pipeline design and prompt engineering patterns
  • Strong system design skills with experience building scalable, production-grade AI systems
  • Experience in EDA tools or semiconductor design flows is a significant advantage
  • Familiarity with cloud platforms (AWS, GCP, or Azure)
What Makes This Role Unique

You are not just building software — you are building the AI brain that designs the chips of tomorrow. This is a legacy-defining role at a company poised to be one of the most important deep tech startups of the decade. Compensation is top-of-market with meaningful equity upside.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Staff Silicon Engineer
Staff Silicon Engineer

Cognichip • Redwood City (CA)

Hybrid
USD 130,000 - 160,000
Full-Stack AI Engineer
Full-Stack AI Engineer

ChipAgents • San Jose (CA)

On-site
USD 150,000 - 350,000
Unlimited PTO
Full medical benefits (medical, vision, dental)
401k
+3
Staff Chip Engineer — Agentic AI Chip Design Leader
Staff Chip Engineer — Agentic AI Chip Design Leader

Yugal Tech Academy • Redwood City (CA)

On-site
USD 150,000 - 200,000
Silicon Engineer
Silicon Engineer

Cognichip • Redwood City (CA)

Hybrid
USD 100,000 - 140,000
Senior Design and Verification Engineer – AI for EDA Solutions
Senior Design and Verification Engineer – AI for EDA Solutions

ScOp Venture Capital • Santa Clara (CA)

On-site
USD 120,000 - 160,000
Competitive salary
Equity
Benefits
+1
Design and Verification Engineer
Design and Verification Engineer

ChipAgents • San Jose (CA)

On-site
USD 150,000 - 350,000
Unlimited PTO
Full medical, vision, and dental benefits
Free lunch, drinks, and snacks
Research Scientist - AI for Electronic Design Automation
Research Scientist - AI for Electronic Design Automation

ScOp Venture Capital • Santa Clara (CA)

On-site
USD 150,000 - 230,000
Staff Chip Design Engineer
Staff Chip Design Engineer

Cognichip • Redwood City (CA)

Hybrid
USD 150,000 - 200,000
Staff Software Engineer - Data Pipelines for AI + Chip Design
Staff Software Engineer - Data Pipelines for AI + Chip Design

Cognichip • Redwood City (CA)

On-site
USD 120,000 - 160,000
Principal ASIC Design Engineer
Principal ASIC Design Engineer

Cognichip • Redwood City (CA)

On-site
USD 160,000 - 210,000
Competitive compensation
Equity and benefits
Flexible work environment