Silicon Design Lead — Secure AI Hardware Architect

OpenAI, Inc.; San Francisco (CA); Sur place; USD 287 000 - 485 000; Plein temps

Résumé du poste

OpenAI’s Hardware team seeks a Silicon Design Lead to drive architecture, microarchitecture, and secure IP for AI hardware platforms. You will translate requirements into efficient silicon designs, owning decisions from architectural definition through integration, with a focus on security in partnership with the Security team.

You will collaborate with RTL, verification, firmware, and software teams, review RTL implementations, evaluate IP, and drive solutions across subsystem boundaries to

Qualifications

• Experience in silicon IP or subsystem architecture and implementation.
• Ability to translate requirements into hardware architectures and interfaces.
• Experience with memory encryption, key management, and secure boot is a plus.

Responsabilités

• Own architecture, microarchitecture, and implementation of silicon IP and subsystems.
• Define interfaces and data flows to meet functional, performance, power, and area goals.
• Collaborate with Security and RTL teams to implement hardware security features.

Connaissances

Silicon IP Architecture

RTL/Verilog SystemVerilog

Security hardware features

Hardware design leadership

SoC integration

Formation

Bachelor's degree in Electrical Engineering or related

Outils

Verilog/SystemVerilog

RTL Design Tools

Description du poste

OpenAI’s Hardware team seeks a Silicon Design Lead to drive architecture, microarchitecture, and secure IP for AI hardware platforms. You will translate requirements into efficient silicon designs, owning decisions from architectural definition through integration, with a focus on security in partnership with the Security team.

You will collaborate with RTL, verification, firmware, and software teams, review RTL implementations, evaluate IP, and drive solutions across subsystem boundaries to