Silicon Design Engineer — RTL, Microarchitecture & DFT

Advanced Micro Devices, Inc.; Town of Fishkill (NY); On-site; USD 140,000 - 210,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

Advanced Micro Devices, Inc. (AMD) is hiring a PMTS Silicon Design Engineer to execute RTL development for processor core pipelines and related logic.

You will collaborate with hardware and software teams to define high-level architecture and contribute to microarchitecture development for next-generation high-performance cores. Responsibilities include design verification, synthesis, power reduction, timing convergence, and floorplanning; travel is not required.

Qualifications

• Master's degree (or foreign equivalent) in Computer Engineering, Electrical Engineering, Electronic Engineering, or related field.
• Five (5) years of experience in job offered or related role; alternative: Bachelor's + seven (7) years progressive experience.

Responsibilities

• Execute RTL design and coding for sections of the processor core pipeline and related logic.
• Collaborate with hardware and software engineers to define high-level architecture.
• Participate in microarchitecture definition for next-generation high-performance cores.
• Contribute to design verification, synthesis, power reduction, timing convergence, and floorplanning.

Skills

Verilog RTL

Processor Architecture

Logic Design

RTL for high-speed Processor

Power-saving Techniques

Physical Design & VERIFICATION

Synthesis & Timing Closure

Microarchitecture Development

Debugging & Problem-Solving

Design-for-Test & Debug

Clocking & Power Sequencing

Scripting (Perl/Shell/Tcl)

Education

Master's degree in Computer Engineering / Electrical Engineering / Electronic Engineering or related field

Bachelor's degree + 7 years progressive post-baccalaureate experience

Job description

Advanced Micro Devices, Inc. (AMD) is hiring a PMTS Silicon Design Engineer to execute RTL development for processor core pipelines and related logic.

You will collaborate with hardware and software teams to define high-level architecture and contribute to microarchitecture development for next-generation high-performance cores. Responsibilities include design verification, synthesis, power reduction, timing convergence, and floorplanning; travel is not required.