Signal Integrity Lead for Hyperscale Data Center Hardware

Google; Sunnyvale (CA); On-site; USD 159,000 - 230,000; Full time

Job summary

Google is seeking a Signal Integrity Engineer to design and build high-performance data center hardware systems from concept through high-volume manufacturing. You will collaborate across board, chip, and system teams to optimize interconnects and ensure product reliability for massive-scale infrastructure.

Ideal candidates have a strong SI background, experience with SerDes testing, and comfort with lab validation, PCB design, and scripting.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
• 4 years of experience working in a signal integrity technical environment, or 3 years of experience with an advanced degree.
• Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field is preferred; 1 year of technical leadership is also preferred.

Responsibilities

• Support System Signal Integrity (SI) design on data center hardware products.
• Collaborate with board, chip and system engineers, design partners, and chip vendors to support system SI design, explore layout and manufacturability tradeoffs, and ensure that product functions as required.
• Support ASIC, package, board, connector, and cable vendors to develop new interconnect technologies.
• Participate in system interconnects bring up and qualification, work with test engineers and include configuring chips to ensure adequate margin.
• Collaborate with design engineers, PCB designers, and system teams to help solve SI issues.

Skills

SerDes testing

Technical leadership

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience

Tools

Allegro

HFSS

Siwave

ADS

MATLAB

PowerDC

PowerSI

Python

Bash

Job description

Google is seeking a Signal Integrity Engineer to design and build high-performance data center hardware systems from concept through high-volume manufacturing. You will collaborate across board, chip, and system teams to optimize interconnects and ensure product reliability for massive-scale infrastructure.

Ideal candidates have a strong SI background, experience with SerDes testing, and comfort with lab validation, PCB design, and scripting.