Senior Signal and Power Integrity Engineer

Wilder Technologies, LLC; United States; Sur place; USD 120 000 - 170 000; Plein temps

Résumé du poste

Wilder Technologies, LLC seeks a Senior Signal and Power Integrity Engineer to lead interconnect design efforts for state-of-the-art test point adapters supporting IEEE802.3, OIF, and PCI-SIG standards. The role involves coordinating a team of design engineers and customer teams.

Responsibilities include electrical modeling and simulation of high-speed IO interconnects, defining features to meet performance goals, creating test plans, and correlating measurements to simulations to refine models

Qualifications

• Master’s Degree in Electrical Engineering or Bachelor’s with 5–10 years of applicable experience.
• Familiar with test equipments such as VNA and TDR.
• Knowledge of HFSS, OrCAD, LTSpice and PSpice.
• Knowledge of scripting languages such as MathLab, Perl/TK and Python are plus
• Team leadership is a plus

Responsabilités

• You will be working with a team of Signal Integrity Engineers to develop the interconnect designs for state-of-the-art test point adapter to support the latest standards such as IEEE802.3, OIF and PCI-SIG.
• Leading and/or coordinating a team of designer engineers, customer teams, etc.
• Electrical modeling and simulation of high speed IO interconnects.
• Definition and evaluation of circuit design features required to support interconnect performance requirements
• Creation of signal measurement test plans and review of measurement results
• Correlation of measurements to simulations, and modification of models as required

Connaissances

Team leadership

Project coordination

Communication

Formation

Master’s degree in Electrical Engineering

Bachelor’s degree with 5–10 years experience

Outils

HFSS

OrCAD

LTSpice

PSpice

Description du poste

Senior Signal and Power Integrity Engineer

Qualifications:

• Applicants should possess a Master’s Degree in Electrical Engineering, or a Bachelor’s Degree with at least 5-10 years of applicable experience
• Familiarity with test equipments such as VNA and TDR.
• Knowledge of simulation and layout tools such as HFSS, OrCAD, LTSpice and PSpice
• Knowledge of scripting languages such as MathLab, Perl/TK and Python are plus
• Team leadership is a plus

Responsibilities:

• You will be working with a team of Signal Integrity Engineers to develop the interconnect designs for state-of-the-art test point adapter to support the latest standards such as IEEE802.3, OIF and PCI-SIG.
• Leading and/or coordinating a team of designer engineers, customer teams, etc.
• Electrical modeling and simulation of high speed IO interconnects.
• Definition and evaluation of circuit design features required to support interconnect performance requirements
• Creation of signal measurement test plans and review of measurement results
• Correlation of measurements to simulations, and modification of models as required