Digital ASIC Design Engineer — SoC/High-Perf (RSU Eligible)

Qualcomm; San Diego (CA); On-site; USD 99,000 - 148,000; Full time

Benefits offered by this job

Bonus program

RSU grants

Benefits package

Job summary

Qualcomm Technologies, Inc. in San Diego is seeking an ASIC Engineer to define, design, verify, and document IP/SoC blocks for high performance, low power products across mobile, automotive, compute, AI and XR.

The role emphasizes RTL design, verification, and architectural definition using Verilog/SystemVerilog, VHDL, and scripting, with opportunities to influence next‑gen initiatives and architecture choices.

Qualifications

• RTL/SoC design and verification experience.
• Knowledge of clock design and power related features.
• Experience with ASIC design flows and verification processes.

Responsibilities

• Uses tools to architect and design SOC according to design protocol.
• Resolves architecture, design, or verification problems with supervision.
• Executes the design and supports verification of ASICs, SoC, and IP cores.
• Participates in IP design and analyses.
• Identifies areas for flow and process improvements.
• Feeds silicon learnings to improve design methodology.

Skills

RTL design

Verilog/SystemVerilog

VHDL

Python/Perl

Education

Bachelor's degree in Science, Engineering, or related field

Job description

Qualcomm Technologies, Inc. in San Diego is seeking an ASIC Engineer to define, design, verify, and document IP/SoC blocks for high performance, low power products across mobile, automotive, compute, AI and XR.

The role emphasizes RTL design, verification, and architectural definition using Verilog/SystemVerilog, VHDL, and scripting, with opportunities to influence next‑gen initiatives and architecture choices.