Senior Verification Lead - AI Accelerator SoC

Acceler8 Talent

Texas

On-site

USD 140,000 - 200,000

Full time

2 days ago
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Job summary

Acceler8 Talent in Austin, TX is seeking a Senior Design Verification Engineer to own a verification domain within an AI accelerator program, spanning IP, SoC and full-chip verification. You will develop end-to-end verification strategies, build and maintain UVM testbenches, and collaborate closely with hardware and software teams to close gaps.

Visa sponsorship available. Ideal candidates have 5+ years in pre-silicon verification, strong UVM experience, and a track record of debugging complex

Qualifications

  • At least five years of pre-silicon verification experience with ownership of IP, subsystems or SoCs from planning through functional closure.
  • Strong experience in one or more domains: block or subsystem verification, CPU subsystem and IP integration, full-chip verification, emulation, DMA/NoC, or multi-SoC and die-to-die protocols.
  • Strong command of UVM methodology and testbench architecture.
  • Track record of debugging complex designs and delivering end-to-end verification results.
  • Ability to interpret specifications from both hardware and software perspectives.

Responsibilities

  • Own a verification domain from understanding specifications and developing the verification plan through debug and functional closure.
  • Develop end-to-end verification strategies spanning IP, SoC-level testing and emulation.
  • Build and maintain UVM testbench architecture suited to complex accelerator designs.
  • Work closely with hardware and software engineers to understand system behaviour, identify verification gaps and resolve failures.
  • Develop and use AI-assisted verification and emulation flows to accelerate development.

Job description

Acceler8 Talent in Austin, TX is seeking a Senior Design Verification Engineer to own a verification domain within an AI accelerator program, spanning IP, SoC and full-chip verification. You will develop end-to-end verification strategies, build and maintain UVM testbenches, and collaborate closely with hardware and software teams to close gaps.

Visa sponsorship available. Ideal candidates have 5+ years in pre-silicon verification, strong UVM experience, and a track record of debugging complex

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