Senior Verification Engineer - Hardware

NVIDIA Gruppe; Santa Clara (CA); On-site; USD 168,000 - 264,500; Full time

Benefits offered by this job

Equity options

Comprehensive benefits package

Job summary

NVIDIA Gruppe is seeking a Verification Engineer to join our Emulation division in Santa Clara, California. You will support various emulation environments using cutting-edge techniques and facilitate collaboration across teams.

The ideal candidate holds an M.S. and has over three years of experience in verification, proficient in Verilog, VHDL, C/C++, and SystemVerilog. A dynamic workplace awaits you with a commitment to innovation.

Qualifications

• 3+ years of proven experience in verification engineering.
• Experience with hierarchical design approaches and top-down design.
• Familiarity with collaborative work across multiple teams.

Responsibilities

• Support multiple emulation environments using the latest emulation techniques.
• Root cause SoC/Processor test failures and emulator environment issues.
• Lead emulation vendors to debug issues using various tools.

Skills

Verilog

VHDL

C/C++

SystemVerilog

Python

Perl

UVM verification

Education

M.S in Electrical Engineering, Computer Science, Computer Engineering or related field

Job description

NVIDIA is looking for a Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking technology. We are work‑flex, family and diverse team! NVIDIA invention of the GPU in 1999 accelerated the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new adventurous opportunities, that only we can seek, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Join us today!

What you will be doing

• Support multiple emulation environments using the latest emulation techniques (C/C++ DPI Transactors, SV assertions, Coverage, Power Estimation, SpeedBridges, Accelerated UVM Testbenches).
• Bring up SOCs on emulation, root cause SoC/Processor test fails and emulator environment issues.
• Have continual collaboration with Design, DV, Power, Silicon Validation, Performance, and Software teams.
• Work constructively leading emulation vendors to debug issues using various tools.

What we need to see

• M.S or equivalent experience in Electrical Engineering, Computer Science, Computer Engineering or related field.
• 3+ years of proven experience.
• Individual should be proficient in Verilog and/or VHDL, C/C++ and SystemVerilog.
• Experience with UVM verification environments and scripting with Perl, Python and C/C++ is essential.
• Be familiar with hierarchical design approach, top‑down design, SoC and system level verification.
• Candidates will be working on‑site at our Santa Clara, CA location.

Salary and Benefits

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits.

Applications for this job will be accepted until April 17, 2026.

Equal Opportunity Employer

NVIDIA is committed to fostering a diverse work environment and is a proud equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.