Senior System Verification Engineer: Mixed-Signal/RTL

NVIDIA Corporation; Austin (TX); Vor Ort; USD 200.000 - 322.000; Vollzeit

Zusammenfassung

NVIDIA Corporation in Austin, TX seeks an experienced hardware verification engineer to advance pre-silicon verification for NVIDIA DGX servers. You will define verification strategies and collaborate across architecture, ASIC, FPGA, software, and system teams to deliver robust board-level designs.

The role emphasizes RTL development, mixed-signal and SPICE simulation, and strong Python triggers for automation, with a focus on performance, functionality, and quality metrics in a world-class

Qualifikationen

• BS or MS in Electrical or Computer Engineering (or equivalent experience).
• 12+ years of proven experience in Mixed-Signal Simulation or PCB design.
• Software programming skill in Python.
• Mixed-signal or SPICE Simulation Experience.
• Verilog RTL Development and Simulation Experience.
• Excellent verbal, written, and presentation communications skills, organizational capabilities, and collaborative interpersonal skills.

Aufgaben

• Define design processes, tool flows, and verification approaches to deliver bug-free board and system designs.
• Board and system level RTL design, Digital and Analog Simulation methodology development.
• Simulation model development for board level digital and mixed signal components.
• Pre-silicon verification of PCB designs including connectivity, design rule, and timing checks.
• Collaborate with architecture, ASIC, FPGA, software, and system design teams to develop end-to-end pre gerber-out verification environments.

Kenntnisse

Python programming

Verilog

RTL verification

Communication skills

Team collaboration

Ausbildung

B.S./M.S. in Electrical or Computer Engineering

Tools

PrimeSim

SPICE simulation

Jobbeschreibung

NVIDIA Corporation in Austin, TX seeks an experienced hardware verification engineer to advance pre-silicon verification for NVIDIA DGX servers. You will define verification strategies and collaborate across architecture, ASIC, FPGA, software, and system teams to deliver robust board-level designs.

The role emphasizes RTL development, mixed-signal and SPICE simulation, and strong Python triggers for automation, with a focus on performance, functionality, and quality metrics in a world-class