Senior Staff Engineer (C++)

Spectraforce Technologies; Santa Clara (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Spectraforce Technologies in Santa Clara, CA is seeking a Senior Staff Engineer to lead ASIC/SoC design, verification, and integration across high-performance GPU and graphics workloads.

Responsibilities include architecting digital/analog blocks, coordinating with software and hardware teams, and delivering robust IP from concept to deployment. Strong SystemVerilog, UVM, and RTL tools experience is required, with a focus on scalable, power-efficient architectures.

Qualifications

• Bachelor's degree in Science, Engineering, or related field with 6+ years of ASIC design/verification experience.
• Master's degree in Science, Engineering, or related field with 5+ years of ASIC design/verification experience.
• PhD in Science, Engineering, or related field with 4+ years of ASIC design/verification experience.

Responsibilities

• Define, model, design, verify, validate, implement, and document IP for high-performance, low-power products.
• Create advanced architectures and system simulations from requirements.
• Collaborate with software/hardware/product management teams to meet system needs.
• Evaluate design flow from high-level design to timing, power, and verification.
• Develop driver and compiler software to support GPU products.
• Prepare detailed technical documentation for complex GPU/ASIC projects.
• Guide junior engineers through technical reviews and documentation.

Skills

C/C++

Python

Shell scripting

Linux/Unix

CPU/GPU microarchitecture

Education

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Tools

Verilog/SystemVerilog

UVM

RTL simulation tools (VCS/Xcelium/Questa)

AI-assisted development tools (VSCode, Claude Code, Copilot)

Job description

Job Title: Senior Staff Engineer

Location: Santa Clara, CA 95051

Duration: 5 mons

JOB DESCRIPTION

Top 5 Required Skills

• Hands-on experience with Linux/Unix environments and strong programming skills in C/C++, Python, and Shell scripting


• Experience in Design Verification using SystemVerilog and UVM


• Knowledge of CPU or GPU microarchitecture, pipelines, and cache subsystems


• Experience using VSCode, Claude Code, GitHub Copilot, or other AI-assisted CLI tools with MCP support

Technologies:

• Linux/Unix development environment


• C/C++, Python, and Shell scripting


• Verilog/SystemVerilog


• UVM (Universal Verification Methodology)


• RTL simulation and debug tools (VCS, Xcelium, or Questa)


• CPU or GPU microarchitecture and cache concepts


• VSCode, Claude Code, Cursor, GitHub Copilot, or similar AI-assisted development tools with MCP support

Required Education:

Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.?

Principal Duties and Responsibilities:

• Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.


• Creates highly advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.


• Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs.


• Evaluates all aspects of highly complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.


• Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable highly advanced architecture and design of multiple complex blocks/SoC or IC Packages.


• Writes detailed technical documentation for highly complex EDA/IP/ASIC projects; reviews technical documentation for junior engineers.


• Leverages advanced GPU knowledge and experience to architect, design, implement, verify, and/or optimize the performance and power of GPU cores.


• Builds functional model simulations, develops software, and tests for various graphics to verify correctness and ensures highly advanced performance and power goals are met.


• Designs, programs, and runs complex, comprehensive graphics tests using tools for large subsystems to ensure high-quality functionality, performance, power, and stability and identify issues.


• Facilitates collaboration with third-party vendors, external users, and across organizations to guide implementation and ensure alignment with needs and goals.


• Develops critical driver and compiler software to support the GPU products.


• Writes detailed technical documentation and feature descriptions for highly complex GPU projects to guide users and/or customers to implement output; reviews technical documentation for junior engineers.

Level of Responsibility:

• Provides supervision/guidance to other team members.


• Decision-making is significant in nature and affects work beyond immediate work group.


• Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc.


• Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).


• Tasks do not have defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.