Senior Staff Design Verification Engineer — Hybrid + Equity

Lightmatter; Boston (MA); Hybrid; USD 186.000 - 236.000; Vollzeit

Benefits dieser Stelle

Health Care Plan

Retirement Matching Program

Paid Time Off

Family Leave

Disability Insurance

Training & Development

Hybrid workplace

Equity grants

Zusammenfassung

Lightmatter is hiring a Design Verification Engineer to join a multidisciplinary team advancing AI data center photonics. The role emphasizes rigorous DV using UVM, RNM and AMS verification across digital, analog, and photonic designs.

You will collaborate with architecture, DV, digital and analog/photonics engineers to define validation flows, build reusable test benches, and drive signoff with high coverage through emulation and mixed-signal simulations.

Qualifikationen

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
• 8+ years of design verification and SystemVerilog experience.
• 2+ years of Python experience.
• Expertise with the UVM library.
• Experience with simulators Xcelium, ModelSim, Questa, or VCS.
• Strong problem solving and collaboration skills.

Aufgaben

• Define and enhance DV methodologies for digital, analog, and photonic devices with emulation emphasis.
• Create and execute test plans to ensure high-quality tapeouts meeting functional and performance goals.
• Collaborate with architects, DV engineers, digital and analog/photonics designers to define validation flows.
• Create reusable, scalable test bench components for efficient verification.
• Close DV signoff with high coverage using mixed-signal simulations.

Kenntnisse

Design verification

Python

UVM

Xcelium/ModelSim/Questa/VCS

Collaboration

Problem solving

Ausbildung

Bachelor’s degree in EE/CE or related field

Master’s degree or higher (preferred)

Tools

Xcelium

ModelSim

Questa

VCS

Jobbeschreibung

Lightmatter is hiring a Design Verification Engineer to join a multidisciplinary team advancing AI data center photonics. The role emphasizes rigorous DV using UVM, RNM and AMS verification across digital, analog, and photonic designs.

You will collaborate with architecture, DV, digital and analog/photonics engineers to define validation flows, build reusable test benches, and drive signoff with high coverage through emulation and mixed-signal simulations.