Senior Space Communications DSP Architect

Blue Origin

Seattle (WA)

On-site

USD 230,398 - 322,556

Full time

14 days+

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Benefits offered by this job

Stock Options for regular employees
Paid Time Off: 4 weeks + holidays
Education Support Program

Job summary

Blue Origin invites engineers to work onsite across US sites (Bay Area, San Diego, Austin, Kent) on the TeraWave program. You will develop models and algorithms for the Custom Silicon, focusing on packet processing, MAC/PHY, and DSP to achieve high performance with low power consumption.

Collaboration with ASIC, RFIC, and SW teams is essential for pre- and post-silicon validation. Strong background in signal processing, modem design, and DSP is required, with experience in MATLAB/SystemC/C++.

Qualifications

  • 7+ years of signal processing or modem design experience.
  • B.S. in Electrical/Computer Engineering or related field.
  • Experience with networking, modem MAC/PHY, DSP, RF or mixed-signal designs.
  • Experience with MATLAB, SystemC, C/C++ or similar System-level tools.
  • Knowledge of DSP and communications systems including OFDM, QAM, PCM/FM, PAM.

Responsibilities

  • Develop models and algorithms for the TeraWave Custom Silicon including packet processing, MAC, PHY, and DSP.
  • Aim for lowest power consumption and highest performance.
  • Target algorithms for FPGA and ASIC implementation.
  • Support ASIC through pre-silicon verification.
  • Design advanced digital end-to-end communication systems.
  • Model channel impairments and simulate system performance.
  • Collaborate with ASIC, RFIC, and SW teams.
  • Prototype pre-silicon bring-up and post-silicon validation support.

Skills

7+ years experience
Electrical/Computer Engineering
Networking & DSP
MATLAB/SystemC/C++
DSP & communications systems

Education

B.S. in Electrical or Computer Engineering

Tools

MATLAB
SystemC
C/C++

Job description

Blue Origin invites engineers to work onsite across US sites (Bay Area, San Diego, Austin, Kent) on the TeraWave program. You will develop models and algorithms for the Custom Silicon, focusing on packet processing, MAC/PHY, and DSP to achieve high performance with low power consumption.

Collaboration with ASIC, RFIC, and SW teams is essential for pre- and post-silicon validation. Strong background in signal processing, modem design, and DSP is required, with experience in MATLAB/SystemC/C++.

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