Senior Software Engineer - Low-Latency Options Execution

Cumberland

New York (NY)

On-site

USD 200,000 - 225,000

Full time

10 days ago

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Benefits offered by this job

Annual discretionary bonus
Comprehensive benefits package

Job summary

DRW is seeking a Senior Software Engineer to develop and improve low-latency trade execution systems for our Asia Equity Options business. You will work at the intersection of research and trading teams, applying cutting-edge, high-performance technologies to real-time markets.

You'll be backed by senior technologists and have opportunities to influence architecture, optimize latency, and interface with FPGA trading systems. A strong background in C++17+, Boost and multithreading is essential.

Qualifications

  • 4+ years of experience in the trading industry.
  • Experience building high-availability, low-latency systems.
  • Experience interfacing with ultra-low-latency FPGA trading systems.
  • Strong C++17+ with Boost and STL knowledge.
  • Python experience is a plus.
  • Background in multithreaded programming and hardware/software interaction.
  • Comfort working 'under the hood' with performance tuning on Linux.
  • Collaborates with researchers and quantitative teams.

Responsibilities

  • Develop high-availability C++/Python systems under tight latency constraints.
  • Interface with ultra-low-latency FPGA trading systems.
  • Contribute to highly distributed systems architecture.
  • Analyze and discuss stakeholder requirements.
  • Lead new initiatives and drive projects.
  • Collaborate with team to resolve challenging design issues.

Skills

C++17+
Boost
STL
Python
Multithreading
Low-latency systems
Distributed systems
Performance tuning

Tools

FPGA

Job description

DRW is seeking a Senior Software Engineer to develop and improve low-latency trade execution systems for our Asia Equity Options business. You will work at the intersection of research and trading teams, applying cutting-edge, high-performance technologies to real-time markets.

You'll be backed by senior technologists and have opportunities to influence architecture, optimize latency, and interface with FPGA trading systems. A strong background in C++17+, Boost and multithreading is essential.

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