Senior SOC Verification Engineer - Flexible Hours & Silicon

Amazon; Cupertino (CA); On-site; USD 183,000 - 248,000; Full time

Job summary

Amazon's Machine Learning Acceleration team in Cupertino is seeking an experienced Design Verification Engineer to help design and optimize custom silicon for AI workloads in data centers. You will verify SOC designs, integrate IPs, and develop robust testbenches and coverage plans.

This role requires 8+ years in design verification, expertise with SystemVerilog/UVM, and strong scripting in Python or C++. We offer a collaborative, inclusive culture and opportunities to mentor peers as you tackle

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering
• 8+ years of design verification experience using System Verilog and UVM
• 8+ YOE in testbench development including: stimulus, checkers, assertions and coverage

Responsibilities

• Verify custom chip designs at the SOC level
• Integrate 3rd party IPs and VIPs into the SOC testbench
• Create comprehensive testplans, write robust random testcases, and execute coverage plans
• Maintain autosmoke and regression infrastructure
• Dive deep into bugs and triages
• Mentor junior engineers

Skills

SystemVerilog

UVM

Testbench development

C/C++

Python scripting

AMBA protocols

PCIe

UCIe

Memory sub-systems

CPU/GPU/ML accelerator verification

Education

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering

Job description

Amazon's Machine Learning Acceleration team in Cupertino is seeking an experienced Design Verification Engineer to help design and optimize custom silicon for AI workloads in data centers. You will verify SOC designs, integrate IPs, and develop robust testbenches and coverage plans.

This role requires 8+ years in design verification, expertise with SystemVerilog/UVM, and strong scripting in Python or C++. We offer a collaborative, inclusive culture and opportunities to mentor peers as you tackle