Senior SOC Verification Engineer for Cloud-Scale ML Accelerators

Amazon Web Services (AWS); Cupertino (CA); On-site; USD 183,000 - 248,000; Full time

Job summary

Annapurna Labs (U.S.) Inc. is seeking an experienced Design Verification Engineer to verify SOC-level designs for cloud server chips.

You will integrate third-party IPs, create robust test plans, and drive coverage across complex CPU/GPU/ML accelerator blocks in data centers. Applicants should have a Bachelor's degree or higher in CS/CE/EE and 8+ years of SystemVerilog/UVM design verification, plus hands-on testbench development and Python scripting.

Qualifications

• Bachelor's degree or above in Computer Science, Computer Engineering, Electrical Engineering, or related fields.
• 8+ years of design verification experience using System Verilog and UVM.
• 8+ YOE in testbench development including: stimulus, checkers, assertions and coverage.

Responsibilities

• Verify custom chip designs at the SOC level
• Integrate 3rd party IPs and VIPs into the SOC testbench
• Create comprehensive testplans, write robust random testcases, and execute coverage plans
• Maintain autosmoke and regression infrastructure
• Dive deep into bugs and triages
• Mentor junior engineers

Skills

SystemVerilog

UVM

Testbench development

C/C++

Python

AMBA protocols

PCIe/UCIe

ML accelerator verification

Education

Bachelor's degree or above in CS/CE/EE

Tools

C/C++

Python scripting

SystemVerilog tooling

AMBA protocol tooling

Job description

Annapurna Labs (U.S.) Inc. is seeking an experienced Design Verification Engineer to verify SOC-level designs for cloud server chips.

You will integrate third-party IPs, create robust test plans, and drive coverage across complex CPU/GPU/ML accelerator blocks in data centers. Applicants should have a Bachelor's degree or higher in CS/CE/EE and 8+ years of SystemVerilog/UVM design verification, plus hands-on testbench development and Python scripting.