Senior SoC Verification Architect — Hybrid

Intel; Santa Clara (CA); Hybrid; USD 164,470 - 269,100; Full time

Job summary

Intel in the United States (Folsom/Santa Clara) seeks a Senior SoC Design Verification Engineer to lead verification for complex SoCs enabling client computing and AI technologies. You will drive verification strategy, architecture, and methodologies across block, subsystem, and SoC levels.

You will mentor engineers, collaborate with architects and RTL designers, and develop scalable verification environments while ensuring security-focused tests and coverage.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 8+ years of experience in SoC verification, including test planning, implementation, and debug.
• System Verilog, OVM or UVM methodologies, and SoC test environment/VC development.
• Debugging and root cause analysis in pre-silicon environments.
• Experience with hardware simulation tools and methodologies.
• System architecture, SoC architecture, and microarchitecture concepts.
• Developing scalable, reusable, and maintainable verification environments.
• Working closely with RTL designers and architects to verify complex digital designs.

Responsibilities

• Perform functional logic verification of integrated SoCs to ensure designs meet specifications.
• Define and develop scalable, reusable block, subsystem, and SoC verification plans, test benches, and verification environments.
• Execute verification plans using emulation and system simulation models to analyze power, performance, and functionality.
• Identify, replicate, root cause, and debug issues in the pre-silicon environment, implementing corrective measures to resolve failing tests.
• Collaborate with SoC architects, microarchitects, RTL developers, post-silicon teams, and physical design teams to enhance verification methodologies.
• Develop and execute security-focused test plans to ensure security coverage during regression and debug testing.
• Maintain and improve existing functional verification infrastructure and methodologies for future products.
• Incorporate learning from post-silicon validation to identify gaps and update test plans to improve coverage for subsequent projects.
• Document test plans and conduct technical reviews with design and architecture teams.

Skills

SystemVerilog

OVM/UVM

Debugging

Hardware simulation

RTL collaboration

Python scripting

Education

Bachelor's degree in Electrical/Computer Engineering or CS

Master's degree or PhD (preferred)

Tools

DFT tools

HDL simulators

Job description

Intel in the United States (Folsom/Santa Clara) seeks a Senior SoC Design Verification Engineer to lead verification for complex SoCs enabling client computing and AI technologies. You will drive verification strategy, architecture, and methodologies across block, subsystem, and SoC levels.

You will mentor engineers, collaborate with architects and RTL designers, and develop scalable verification environments while ensuring security-focused tests and coverage.