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Synopsys, Inc. is seeking experienced engineers who design and integrate complex SoC architectures with a focus on IP blocks and interfaces.
You will map customer requirements to subsystem architectures, specify interfaces and performance targets, and guide designs through the full lifecycle from evaluation to silicon bring-up. The role requires deep knowledge of Verilog/SystemVerilog, RTL design, and high-speed signaling, along with strong communication skills for customer-facing work.
Synopsys, Inc. is seeking experienced engineers who design and integrate complex SoC architectures with a focus on IP blocks and interfaces.
You will map customer requirements to subsystem architectures, specify interfaces and performance targets, and guide designs through the full lifecycle from evaluation to silicon bring-up. The role requires deep knowledge of Verilog/SystemVerilog, RTL design, and high-speed signaling, along with strong communication skills for customer-facing work.