Senior SoC Design Engineer: PCIe/ARM RTL Expert

Arm Limited

San Diego (CA)

In loco

USD 162.000 - 219.000

Tempo pieno

14 giorni+
Generatore di candidature

Trasforma questo annuncio in un colloquio — un curriculum e una lettera di presentazione creati in base a ciò questo datore di lavoro sta cercando.

Supera i filtri ATS

Vantaggi offerti da questo lavoro

RSUs
401k matching
PTO
Family time

Descrizione del lavoro

Arm Limited in San Diego is seeking a self-motivated design engineer with expertise in micro-architecture, RTL and system IP integration to develop and optimize compute subsystems for advanced SoCs.

You will collaborate across architecture, verification and backend teams to define specs, write micro-architecture docs, implement RTL, run checks and help timing closure on PCIe, DDR/LPDDR, HBM and Ethernet interfaces, with a strong focus on performance and design quality.

Competenze

  • Bachelors or Masters degree in Computer Science or Electrical/Computer Engineering or a similar related field
  • 7+ years experience working in design of complex compute subsystems or SoCs
  • Strong knowledge of digital hardware design and Verilog HDL
  • Thorough understanding and experience of the current design techniques for complex SoC development
  • Experience developing and integrating subsystems for PCIe, DDR/LPDDR, HBM, UCIe, Ethernet
  • Experience creating design specifications and developing RTL for SoC projects and compute platforms
  • Experience in Static design checks, including CDC, RDC, X-Propagation, Linting
  • Experience with Perl, Python or other scripting language

Mansioni

  • Write micro-architecture specifications and develop RTL for SoCs.
  • Collaborate with verification team to review test plans and debug build issues.
  • Partner with performance analysis team to evaluate and improve system performance.
  • Work with backend implementation team to assist with floor planning, constraints and timing closure.
  • Contribute to developing and enhancing the design methodologies used by the team.
  • Guide and support other members to enable successful completion of project activities.
  • Balance responsibilities with Project Management on activities, plans, and schedules.

Conoscenze

Verilog HDL
Digital hardware design
SoC development
RTL development
PCIe/DDR integration
Scripting (Python/Perl)
SystemVerilog

Formazione

Bachelor's or Master's in CS/EE

Strumenti

Synthesis tools

Descrizione del lavoro

Arm Limited in San Diego is seeking a self-motivated design engineer with expertise in micro-architecture, RTL and system IP integration to develop and optimize compute subsystems for advanced SoCs.

You will collaborate across architecture, verification and backend teams to define specs, write micro-architecture docs, implement RTL, run checks and help timing closure on PCIe, DDR/LPDDR, HBM and Ethernet interfaces, with a strong focus on performance and design quality.

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