Senior SoC Design Engineer — ARM/PCIe RTL

Arm Limited; Austin, Northern (TX, KY); Hybrid; USD 162,000 - 219,000; Full time

Job summary

Arm is seeking a senior design engineer in Austin, Texas, to contribute to micro-architecture and RTL development for complex compute subsystems and SoCs. You will design, implement, and verify RTL, collaborate with verification and backend teams, and help set design specs and timing closure.

Ideal candidates have 7+ years in SoC design, strong Verilog HDL skills, and experience with PCIe, DDR/LPDDR, HBM, UCIe, and Ethernet.

Qualifications

• Bachelor's or Master's in Computer Science or Electrical/Computer Engineering.
• 7+ years in design of complex compute subsystems or SoCs.
• Strong knowledge of digital hardware design and Verilog HDL.
• Experience developing and integrating PCIe, DDR/LPDDR, HBM, UCIe, Ethernet subsystems.
• Experience creating design specs and RTL for SoC projects.

Responsibilities

• Write micro-architecture specifications and develop RTL for SoCs.
• Fix bugs and run design checks including CDC and Linting.
• Collaborate with verification to review test plans and debug issues.
• Work with backend team on floorplanning, constraints, and timing.
• Contribute to design methodologies and mentor team members.

Skills

Verilog HDL

Digital hardware design

SoC design experience

Scripting (Perl/Python)

Education

Bachelor's or Master's in CS/EE

Tools

PCIe

DDR/LPDDR

HBM

UCIe

Ethernet

Job description

Arm is seeking a senior design engineer in Austin, Texas, to contribute to micro-architecture and RTL development for complex compute subsystems and SoCs. You will design, implement, and verify RTL, collaborate with verification and backend teams, and help set design specs and timing closure.

Ideal candidates have 7+ years in SoC design, strong Verilog HDL skills, and experience with PCIe, DDR/LPDDR, HBM, UCIe, and Ethernet.