Senior PCIe/SoC Design Engineer

Arm; Austin (TX); Hybrid; USD 162,000 - 219,000; Full time

Job summary

Arm is seeking a design engineer with expertise in micro-architecture, logic design and ARM IPs to work on PCIe, CXL and other IPs for SoCs in a collaborative, inclusive team.

You will design RTL, write micro-architecture specs, fix bugs, and run design checks while collaborating with verification and performance teams to optimize system performance and ensure timely completion of project activities. This role supports hybrid working patterns and involves cutting-edge SoC development at Arm.

Qualifications

• Bachelor's or Master's degree in Computer Science or Electrical/Computer Engineering or a similar related field.
• 5+ years experience working in design of complex compute subsystems or SoCs.
• Strong knowledge of digital hardware design and Verilog HDL.
• Thorough understanding and experience of the current design techniques for complex SoC development.
• Experience developing and integrating subsystems for PCIe, CXL, UCIe, Ethernet.
• Experience creating design specifications and developing RTL for SoC projects and compute platforms.
• Experience in Static design checks, including CDC, RDC, X-Propagation, Linting.
• Experience with Perl, Python or other scripting language.

Responsibilities

• As a creative design engineer with a knowledge of I/O subsystems, SoCs you will be part of a team integrating PCIe, CXL and other IP's for SoCs.
• Collaborate with the project team to understand and review the architecture and develop the build specifications.
• Your key responsibilities will include writing micro-architecture specifications, developing the RTL, fixing bugs, and running various design checks.
• You will collaborate with the verification team to review test plans and help debug build issues.
• Partner with the performance analysis team to evaluate and improve system performance.
• You will work with backend implementation team to help with floor planning, writing constraints, and timing closure.
• You will also contribute to developing and enhancing the design methodologies used by the team.
• You will guide and support other members of the team as needed to enable the successful completion of project activities.

Skills

Verilog HDL

Digital hardware design

ARM IPs

SoCs

PCIe/CXL/UCIe/Ethernet

RTL development

Static design checks

Scripting: Perl/Python

Education

Bachelor's or Master's degree in Computer Science or Electrical/Computer Engineering

Job description

Arm is seeking a design engineer with expertise in micro-architecture, logic design and ARM IPs to work on PCIe, CXL and other IPs for SoCs in a collaborative, inclusive team.

You will design RTL, write micro-architecture specs, fix bugs, and run design checks while collaborating with verification and performance teams to optimize system performance and ensure timely completion of project activities. This role supports hybrid working patterns and involves cutting-edge SoC development at Arm.