Senior Silicon Validation & Test Engineer

TylSemi; San Jose (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

TYLsemi, Inc. is seeking an experienced Senior Development Test Engineer to own end-to-end testing, characterization, and failure analysis for multi-die package silicon.

You will manage validation across die-to-die interconnects, PDN/PMIC, PMC, PCIe/CXL subsystems, and apply ML-aware analytics to test data while ensuring robust root-cause analysis. You'll craft test plans, develop bare-metal content, build scalable automation, and drive lab-to-ATE handoffs, with emphasis on high-speed protocols

Qualifications

• 8–10+ years in post-silicon validation or related testing for complex SoCs/ASICs/GPUs.
• Advanced proficiency in C and Python for low-level test content and automation frameworks.
• Proven experience with Shmoo plotting, jitter/margin analysis, and guard-band definition.
• Hands-on fault injection campaigns on production silicon.
• Fluent lab instrumentation knowledge: oscilloscopes, protocol analyzers (PCIe/CXL), logic analyzers, BERTs, thermal chambers, power supplies, and JTAG debuggers.
• Deep understanding of high-speed protocols (PCIe/CXL/UCIe) and control buses (I2C/SPI/UART/PMBus/SMBus).
• Power systems knowledge: sequencing, PMIC telemetry, DVFS, voltage regulation, protection trip limits.
• Data & tooling: Git, CMake, GCC/Clang, CI pipelines; statistical analysis over test populations.
• Education as listed; AI tool usage for automation is required.

Responsibilities

• Define development test strategies with coverage targets and traceability from requirements to validation evidence.
• Write bare-metal C and Python test suites including exercisers, traffic generators, and drivers/hooks.
• Build scalable test frameworks with instrument control and HIL CI/CD for continuous validation.
• Develop lab-to-ATE correlation test suites and handoffs to Product & Test Engineering.
• Own the development test plan with coverage goals and traceability of requirements to evidence.

Skills

C

Python

Test automation

HIL

PCIe/CXL

Lab instrumentation

Data analysis

Git/CMake

AI tooling

Education

BS in Electrical Engineering

MS in Electrical Engineering

Tools

Oscilloscopes

JTAG debuggers

PCIe/CXL protocol analyzers

Bench equipment

Job description

TYLsemi, Inc. is seeking an experienced Senior Development Test Engineer to own end-to-end testing, characterization, and failure analysis for multi-die package silicon.

You will manage validation across die-to-die interconnects, PDN/PMIC, PMC, PCIe/CXL subsystems, and apply ML-aware analytics to test data while ensuring robust root-cause analysis. You'll craft test plans, develop bare-metal content, build scalable automation, and drive lab-to-ATE handoffs, with emphasis on high-speed protocols