Senior Silicon-Photonics PIC Engineer for DWDM

Qualcomm

Santa Clara, Northern (CA, KY)

Hybrid

USD 139,000 - 209,000

Full time

14 days+
Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Job summary

Qualcomm Atheros, Inc. in Santa Clara, CA is seeking an experienced Photonic IC Designer to define, design, and develop photonic integrated circuits for high-speed interconnects.

You will perform 3D optical simulations with Lumerical and use foundry PDKs, collaborating with RF/analog and packaging teams to tape out devices and validate designs. The role emphasizes scripting, AI-assisted workflows, and post-fabrication characterization to close the loop between simulation and hardware.

Qualifications

  • Bachelor's degree in EE, Physics, Optics, or related field with 5+ years PIC design experience.
  • Master's degree in EE, Physics, Optics, or related field with 3+ years PIC design experience.
  • PhD in EE, Physics, Optics, or related field with 1+ year of PIC design experience.
  • 2+ years hands-on with: Lumerical (FDTD, MODE, CHARGE, INTERCONNECT), and any layout editor/viewer (Cadence Virtuoso, KLayout, or equivalent), and Python.
  • Hands-on design experience with silicon-photonics foundry PDKs.
  • System-level understanding of optical link budgets, DWDM channel plans, OMA/TDECQ, and transceiver power allocation.

Responsibilities

  • Design active (MRM, MZM, photodetectors) and passive (edge/grating couplers, power splitters, wavelength MUX/DEMUX) photonic devices from spec through tape-out using foundry PDKs and 3D structure optical simulation.
  • Perform 3D photonic simulation (FDTD, MODE, INTERCONNECT, and CHARGE for carrier/electro-optic effects) to validate device performance and iterate to target specs.
  • Develop and maintain script-based workflows — leveraging AI-assisted tooling — to automate parameter sweeps, layout generation, and measurement-data processing.
  • Review and sign off on PIC physical layouts produced by the dedicated layout engineer from physical design team.
  • Collaborate with other PIC designers, EIC designers, and package teams to run co-simulations. Align interface specs, and validate electro-optical performance in the full DWDM transceiver system.
  • Execute and interpret post-fabrication characterization lab testing.
  • Close the simulation-to-hardware loop by correlating characterization data with models and proposing corrections.
  • Participate in cross-functional design reviews spanning component performance, tape-out readiness, and system link budget.
  • Maintain internal technical documentation: design specs, simulation methodology, characterization reports, and tape-out checklists.
  • Track silicon photonics, CPO, and DWDM transceiver developments, and apply emerging techniques to improve design quality and time-to-tape-out.

Skills

Python
3D photonic simulation
cross-functional collaboration
system-level understanding

Education

Bachelor's degree in EE/Physics/Optics
Master's degree in EE/Physics/Optics
PhD in EE/Physics/Optics

Tools

Lumerical (FDTD, MODE, INTERCONNECT)
Cadence Virtuoso
KLayout
Python

Job description

Qualcomm Atheros, Inc. in Santa Clara, CA is seeking an experienced Photonic IC Designer to define, design, and develop photonic integrated circuits for high-speed interconnects.

You will perform 3D optical simulations with Lumerical and use foundry PDKs, collaborating with RF/analog and packaging teams to tape out devices and validate designs. The role emphasizes scripting, AI-assisted workflows, and post-fabrication characterization to close the loop between simulation and hardware.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior Silicon Photonics IC Designer (DWDM/AI-Driven)
Senior Silicon Photonics IC Designer (DWDM/AI-Driven)

Qualcomm • Santa Clara (CA)

On-site
USD 139,000 - 209,000
Senior Photonic IC Design Engineer for DWDM Systems
Senior Photonic IC Design Engineer for DWDM Systems

Nutanix • Santa Clara (CA)

On-site
USD 139,000 - 209,000
Annual bonus program
RSU grants
Competitive benefits
Senior Silicon PIC Design Engineer
Senior Silicon PIC Design Engineer

W3Global • Cupertino (CA)

On-site
USD 180,000 - 240,000
Photonic Engineer, Senior Santa Clara, California, United States of America RFIC Design Posted a day ago
Photonic Engineer, Senior Santa Clara, California, United States of America RFIC Design Posted a day ago

Qualcomm • Santa Clara (CA), Northern (KY)

Hybrid
USD 139,000 - 209,000
Senior Silicon Photonics PIC Designer — High-Speed Optics
Senior Silicon Photonics PIC Designer — High-Speed Optics

Broadcom Inc. • Wayne (CA)

On-site
USD 120,000 - 192,000
Medical, dental, and vision plans
401(K) participation with company matching
Employee Stock Purchase Program (ESPP)
+1
Lead Silicon Photonics PIC Design Engineer - Equity & Bonus
Lead Silicon Photonics PIC Design Engineer - Equity & Bonus

Broadcom Inc. • San Jose (CA)

On-site
USD 143,000 - 230,000
Annual bonus
Equity awards
Competitive salary
Photonic Engineer, Senior
Photonic Engineer, Senior

Qualcomm • Santa Clara (CA)

On-site
USD 139,000 - 209,000
Senior Silicon Photonics IC Engineer (PIC)
Senior Silicon Photonics IC Engineer (PIC)

Intel • Santa Clara (CA)

On-site
USD 191,000 - 312,000
Stock bonuses
Health benefits
Retirement plan
+1
Senior Silicon Photonics Analog IC Design Engineer (Hybrid)
Senior Silicon Photonics Analog IC Design Engineer (Hybrid)

Intel • Santa Clara (CA)

Hybrid
USD 142,000 - 269,000
Stock bonuses
Health benefits
Vacation
Senior Photonic IC Design Engineer - High-Speed Optics
Senior Photonic IC Design Engineer - High-Speed Optics

W3Global • Cupertino (CA)

On-site
USD 180,000 - 240,000