Senior Silicon Photonics IC Designer (DWDM/AI-Driven)

Qualcomm; Santa Clara (CA); On-site; USD 139,000 - 209,000; Full time

Job summary

Qualcomm Atheros, Inc. seeks a photonic IC designer to define and develop photonic integrated circuits for high-speed interconnect and DWDM transceivers.

You will use 3D simulations, FDTD/INTERCONNECT tools, and PDKs to drive from concept to tape-out, collaborating with cross-functional teams and applying AI-assisted automation. The role requires advanced degrees or extensive PIC experience, hands-on with Lumerical, Cadence Virtuoso, and Python, plus a track record of silicon-photonics tape-outs

Qualifications

• Bachelor's degree in EE, Physics, Optics, or related field with 5+ years of PIC design experience, OR
• Master's degree in EE, Physics, Optics, or related field with 3+ years of PIC design experience, OR
• PhD in EE, Physics, Optics, or related field with 1+ year of PIC design experiences.
• 2+ years hands-on with: Lumerical (FDTD, MODE, CHARGE, INTERCONNECT), and any layout editor/viewer (Cadence Virtuoso, KLayout, or equivalent), and Python.
• Hands-on design experience with silicon-photonics foundry PDKs.
• System-level understanding of optical link budgets, DWDM channel plans, OMA/TDECQ, and transceiver power allocation.

Responsibilities

• Design active (MRM, MZM, photodetectors) and passive (edge/grating couplers, power splitters, wavelength MUX/DEMUX) photonic devices from spec through tape-out using foundry PDKs and 3D structure optical simulation.
• Perform 3D photonic simulation (FDTD, MODE, INTERCONNECT, and CHARGE for carrier/electro-optic effects) to validate device performance and iterate to target specs.
• Develop and maintain script-based workflows — leveraging AI-assisted tooling — to automate parameter sweeps, layout generation, and measurement-data processing.
• Review and sign off on PIC physical layouts produced by the dedicated layout engineer from physical design team.
• Collaborate with other PIC designers, EIC designers, and package teams to run co-simulations. Align interface specs, and validate electro-optical performance in the full DWDM transceiver system.
• Execute and interpret post-fabrication characterization lab testing.
• Close the simulation-to-hardware loop by correlating characterization data with models and proposing corrections.
• Participate in cross-functional design reviews spanning component performance, tape-out readiness, and system link budget.
• Maintain internal technical documentation: design specs, simulation methodology, characterization reports, and tape-out checklists.
• Track silicon photonics, CPO, and DWDM transceiver developments, and apply emerging techniques to improve design quality and time-to-tape-out.

Skills

PIC design

Lumerical

Python

Cadence Virtuoso

3D optical simulation

Foundry PDKs

DWDM

Optical transceivers

Tape-outs

Co-Packaged Optics

Education

Bachelor’s degree in EE/Physics/Optics

Master’s degree in EE/Physics/Optics

PhD in EE/Physics/Optics

Tools

Lumerical

Cadence Virtuoso

KLayout

Job description

Qualcomm Atheros, Inc. seeks a photonic IC designer to define and develop photonic integrated circuits for high-speed interconnect and DWDM transceivers.

You will use 3D simulations, FDTD/INTERCONNECT tools, and PDKs to drive from concept to tape-out, collaborating with cross-functional teams and applying AI-assisted automation. The role requires advanced degrees or extensive PIC experience, hands-on with Lumerical, Cadence Virtuoso, and Python, plus a track record of silicon-photonics tape-outs