Senior Serdes Systems Engineer - High-Speed 100G+ DSP/ASIC

Broadcom; Irvine (CA); On-site; USD 144,000 - 230,000; Full time

Benefits offered by this job

Equity grant

Annual equity awards

401K with company match

Medical/dental/vision

Job summary

Broadcom is seeking a DSP/Systems Design Engineer for high-speed Serdes in the PLP division. You will model, simulate, and verify complex signal processing for 100G+ Serdes, collaborating with analog and digital designers to validate silicon in new process nodes.

You will develop channel models, system-level simulations, and firmware for physical layer functionality while supporting customers and marketing with technical collateral.

Qualifications

• B.S.E.E. with 12+ years or M.S.E.E. with 10+ years.
• Expert knowledge in Communication Theory.
• Expert knowledge in Digital Signal Processing algorithms.
• Working knowledge of Analog circuit behavior.
• Working knowledge of Transmission line theory and s-parameter.
• Proficient in MATLAB and C/C++ programming.
• Lab skills in hardware evaluation and testing.
• Experience designing high-speed CDR PLLs is highly desirable.
• Experience with wireline Serdes standards is a plus.

Responsibilities

• Develop channel models and run simulations to define Serdes architecture.
• Define and document signal processing block requirements and lab test plans.
• Develop bit-exact MATLAB and C/C++ system models for simulation and verification.
• Create system-level simulation suites for Serdes architecture evaluation.
• Collaborate with RTL team for vector matching verification.
• Develop, test, and debug firmware for physical layer functionality.
• Conduct lab testing and debug of Serdes hardware.
• Prepare documentation and customer support materials.
• Support marketing with customer meetings and collateral.

Skills

Digital Signal Processing

Communication Theory

MATLAB

C/C++ programming

Analog circuit behavior

Transmission line theory

s-parameter

RTL coding

IEEE 802.3/OIF Serdes

PCIe Gen6/Gen7

Education

B.S.E.E. +12+ years

M.S.E.E. +10 years

Tools

MATLAB

C/C++

Job description

Broadcom is seeking a DSP/Systems Design Engineer for high-speed Serdes in the PLP division. You will model, simulate, and verify complex signal processing for 100G+ Serdes, collaborating with analog and digital designers to validate silicon in new process nodes.

You will develop channel models, system-level simulations, and firmware for physical layer functionality while supporting customers and marketing with technical collateral.