Senior Semiconductor Layout Designer

Micron Technology, Inc.; San Jose (CA); On-site; USD 97,000 - 194,000; Full time

Job summary

Micron Technology, Inc. is seeking a Staff Layout Designer in San Jose, CA to develop and prepare multi-dimensional semiconductor layouts from schematics.

You will verify data integrity, lead major block developments, and mentor junior engineers across global sites, including TD, design, verification, and CAD teams. Required AS/BS in electronics/electrical engineering with 10+ years in semiconductor layout, deep Cadence Virtuoso, Synopsys, and Calibre experience, and strong problem-solving

Qualifications

• Must have AS or equivalent in Electronics/Electrical Engineering with a strong track record in semiconductor layout design.
• Deep working knowledge of EDA tools Cadence Virtuoso, Synopsys, and Calibre.
• Strong debugging and root-cause analysis abilities for layout verification.
• Experience leading blocks/projects and mentoring junior team members.

Responsibilities

• Organize and prioritize resources to meet deadlines and develop issue-resolution methodologies.
• Lead major block developments and product revisions; plan and deliver layouts.
• Contribute to layout efficiency through automation and new methods; mentor juniors.

Skills

Layout design

Problem solving

Mentoring

Effective communication

Education

AS in Electronics or Electrical Engineering

BS degree in related field

Tools

Cadence Virtuoso

Synopsys

Calibre

Job description

Micron Technology, Inc. is seeking a Staff Layout Designer in San Jose, CA to develop and prepare multi-dimensional semiconductor layouts from schematics.

You will verify data integrity, lead major block developments, and mentor junior engineers across global sites, including TD, design, verification, and CAD teams. Required AS/BS in electronics/electrical engineering with 10+ years in semiconductor layout, deep Cadence Virtuoso, Synopsys, and Calibre experience, and strong problem-solving