A leading technology company is seeking an RFIC Layout Engineer to join their Wireless SoC Radio Team in San Diego, California. This role involves designing energy-efficient CMOS radios and requires a BS degree with over 10 years of relevant experience. Key responsibilities include the detailed transistor-level layout of RF and analog circuit blocks. The position offers a competitive salary ranging from $163,300 to $290,100, along with comprehensive benefits including medical coverage and stock options.
Qualifications
10+ years of relevant industry experience.
Experience in detailed transistor-level layout.
Solid understanding of RC delay, electromigration.
Responsibilities
Detailed transistor-level layout of RF and analog circuit blocks.
Block level layout through full verification flow.
Co-work with designers on block level floorplanning.
Skills
Custom RF/analog layout
Deep sub-micron CMOS knowledge
Layout techniques for device matching
CADENCE layout tools
Scripting in PERL or SKILL
Education
BS degree
Job description
A leading technology company is seeking an RFIC Layout Engineer to join their Wireless SoC Radio Team in San Diego, California. This role involves designing energy-efficient CMOS radios and requires a BS degree with over 10 years of relevant experience. Key responsibilities include the detailed transistor-level layout of RF and analog circuit blocks. The position offers a competitive salary ranging from $163,300 to $290,100, along with comprehensive benefits including medical coverage and stock options.