Senior RFIC Design Architect — Lead Production Blocks

Kyocera International, Inc. (North America)

San Diego (CA)

In loco

USD 135.000 - 304.000

Tempo pieno

7 giorni fa
Candidati tra i primi

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Vantaggi offerti da questo lavoro

Competitive pay
401(k) with company match
Pension
Medical, dental, and vision insurance
Flexible Spending Account (FSA)
Tuition reimbursement

Descrizione del lavoro

Kyocera International, Inc. (North America) is seeking a Principal Engineer, RFIC Design in San Diego, CA.

You will lead architecture, design, layout, verification, and production ramp for complex RFIC blocks, collaborating across teams to ensure high-quality, production-ready output. The role requires deep RF/analog expertise, mentoring ability, and hands-on experience with Cadence Virtuoso, RF simulations, and EM extraction.

Competenze

  • Advanced degree in electrical engineering or related field required.
  • Experience delivering RFIC blocks from architecture to production ramp.
  • Strong command of RF and analog design concepts and reliability.

Mansioni

  • Lead architecture, design, layout, verification, and production ramp of complex RFIC blocks.
  • Translate system requirements into block specifications and manage tradeoffs (power, area, noise, bandwidth).
  • Perform hands-on design in receivers, transmitters, PLLs, LO distribution, and analog baseband.
  • Drive verification across schematic, post-layout, Monte Carlo, EM, and mixed-signal domains.
  • Mentor engineers, lead design reviews, and communicate decisions to teams.

Conoscenze

RFIC design
Transistor design
System-level design
Leadership

Formazione

MS/PhD in Electrical Engineering

Strumenti

Cadence Virtuoso
RF simulation
EM extraction

Descrizione del lavoro

Kyocera International, Inc. (North America) is seeking a Principal Engineer, RFIC Design in San Diego, CA.

You will lead architecture, design, layout, verification, and production ramp for complex RFIC blocks, collaborating across teams to ensure high-quality, production-ready output. The role requires deep RF/analog expertise, mentoring ability, and hands-on experience with Cadence Virtuoso, RF simulations, and EM extraction.

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