Senior Principal Electronics Engineer - Secret Clearance

Northrop Grumman; Florida; Presencial; USD 123.000 - 184.000; Tempo integral

Benefícios oferecidos por esta vaga

Health insurance

Life insurance

Disability insurance

Savings plan

Paid holidays

Paid time off

Resumo da vaga

Northrop Grumman Mission Systems is seeking a Sr. Principal Electronics Engineer to join a multi-disciplinary team in Apopka, FL. You will lead complex electronic designs, generate schematics and BOMs, and support system integration and testing in a dynamic environment.

Qualifications include a bachelor’s or master’s in Electrical/Computer Engineering and a DoD Secret clearance. Proficiency with Cadence Allegro and experience in FPGA timing and MIL-STD hardware is preferred.

Qualificações

• BS or MS in Electrical/Computer Engineering or related STEM field.
• Experience with electronic design, analog/digital hardware, and PCB concepts.
• Proficiency with Cadence Allegro and common design tools.

Responsabilidades

• Develop complex programmable logic code, analog/digital hardware designs and test docs.
• Create detailed schematics, BOMs, and drawings for electronic designs.
• Support integration and testing of electronic systems with other teams.
• Generate ECNs, update models/drawings, and manage PLM documentation.
• Perform RCCA for hardware failures and work in a fast-paced environment.

Formação

Bachelor’s degree in Electrical Engineering or Computer Engineering

Master’s degree in Electrical Engineering or related STEM

Ferramentas

Cadence Allegro

MATLAB

Simulink

LTSpice

Spice

I2C

SPI

UART

Spacewire

Ethernet

HDMI

MIPI

Descrição da vaga

Northrop Grumman Mission Systems is seeking a Sr. Principal Electronics Engineer to join a multi-disciplinary team in Apopka, FL. You will lead complex electronic designs, generate schematics and BOMs, and support system integration and testing in a dynamic environment.

Qualifications include a bachelor’s or master’s in Electrical/Computer Engineering and a DoD Secret clearance. Proficiency with Cadence Allegro and experience in FPGA timing and MIL-STD hardware is preferred.