Senior Principal DFT Architect End-to-End Tape-out

SiMa.ai, Inc.; San Jose, Northern (CA, KY); Hybrid; USD 231,000 - 358,000; Full time

Benefits offered by this job

Equity

Benefits package

Job summary

SiMa.ai is seeking a Sr. Principal DFT Engineer to own the DFT foundation for next-generation industrial, robotic, and automotive ICs. You will define architecture, drive execution with RTL, verification, and physical design teams, and lead the DFT team to ensure silicon success.

The role requires hands-on leadership across the DFT lifecycle, architecture through tape-out on advanced finFET nodes, with a strong emphasis on collaboration and problem solving.

Qualifications

• BSEE with 18+ years or MSEE/PhD with 16+ years of experience.
• Deep knowledge of DFT across architectures and flows.
• End-to-end DFT execution from architecture to tape-out across multiple ICs.

Responsibilities

• Define DFT architecture and methodology for SiMa's ICs.
• Drive execution with RTL, verification, and physical design teams.
• Be the technical anchor for the DFT team and enable success.
• Own DFT lifecycle from architecture through tape-out and pattern bring-up.

Skills

DFT architecture

Technical leadership

Verilog/SystemVerilog

Cross-functional collaboration

Education

Bachelor's/Master's in EE or PhD

Tools

Synopsys SMS/TestMax

Mentor Tessent

VCS/Verdi

Fusion Compiler

PrimeTime

PrimePower

RedHawk

StarRC

Job description

SiMa.ai is seeking a Sr. Principal DFT Engineer to own the DFT foundation for next-generation industrial, robotic, and automotive ICs. You will define architecture, drive execution with RTL, verification, and physical design teams, and lead the DFT team to ensure silicon success.

The role requires hands-on leadership across the DFT lifecycle, architecture through tape-out on advanced finFET nodes, with a strong emphasis on collaboration and problem solving.