Senior Principal Design Engineer-Palladium & Protium Customer Enablement & Solutions

Cadence Design Systems, Inc.

San Jose (CA)

Presencial

USD 154 000 - 286 000

Tempo integral

Há 9 dias

Uma candidatura completa num minuto

Currículo e carta de apresentação personalizados, prontos a enviar.

Ultrapassa os filtros ATS

Vantagens oferecidas por esta oferta de emprego

401(k) plan with employer match
Employee stock purchase plan
Medical, dental, and vision plans

Resumo da oferta

Cadence Design Systems, Inc. is seeking a Senior Hardware Verification Engineer to join the North America Palladium and Protium HW Development team in San Jose.

You will work directly with industry-leading semiconductor and systems customers to deploy Cadence’s hardware emulation and FPGA prototyping platforms, bridging gaps between customers, AE, PE, and R&D. In this highly visible role, you will develop customer-specific verification solutions, drive advanced acceleration architecture, and

Qualificações

  • Bachelor’s degree with 10+ years in hardware verification or related field.
  • Expertise with high-speed interfaces and memory protocols.
  • Proficiency in SystemVerilog/Verilog and C/C++.

Responsabilidades

  • Collaborate with frontline engineering teams and customers to develop, deploy, productize, and optimize advanced protocol solutions on Palladium and Protium platforms.
  • Define and develop customer-specific emulation and prototyping requirements, focusing on leading edge high-speed interfaces and memory protocols (e.g., PCIe, CXL).
  • Drive the development of advanced acceleration FW + FPGA system solutions, establish robust verification methodologies, and support the operation and maintenance of Cadence emulation tools.
  • Triage and resolve complex, systemic issues across the hardware/software boundary, optimizing driver behavior, protocol compliance, and overall system stability.
  • Lead technical evaluations and develop high-performance benchmarks to demonstrate the competitive advantages of Cadence hardware platforms.
  • Create and deliver impactful technical presentations, white papers, and product demonstrations for existing and prospective customers.

Conhecimentos

Digital design
System architecture
Verification methodologies
Simulation
Strong communication

Formação académica

BS in Electrical Engineering
MS in Electrical Engineering

Ferramentas

SystemVerilog
Verilog
C/C++

Descrição da oferta de emprego

SAN JOSE

Full time

R55242

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Join our North America Palladium and Protium HW Development team and help shape the future of system-level chip design verification. In this highly visible, customer-facing role, you will work directly with industry-leading semiconductor and systems companies to develop and deploy Cadence’s market-leading hardware emulation and FPGA prototyping platforms. You will bridge the gap between customers, Applications Engineering (AE), Product Engineering (PE), and R&D — develop impactful customer solutions, delivering deep R&D technical support, and pioneering innovative verification methodologies to solve our customers’ most complex architectural and high-Speed Protocol challenges.

Key Responsibilities
  • Customer Enablement & Solutions: Collaborate with frontline engineering teams and customers to develop, deploy, productize, and optimize advanced protocol solutions on Palladium and Protium platforms.
  • Requirements & Feature Development: Define and develop customer-specific emulation and prototyping requirements, focusing heavily on leading edge high-speed interfaces and memory protocols (e.g., PCIe, CXL).
  • Advanced Solutions Engineering: Drive the development of advanced acceleration FW + FPGA system solutions, establish robust verification methodologies, and support the operation and maintenance of Cadence emulation tools.
  • Root-Cause Debugging: Triage and resolve complex, systemic issues across the hardware/software boundary, optimizing driver behavior, protocol compliance, and overall system stability.
  • Evaluations & Benchmarking: Lead technical evaluations and develop high-performance benchmarks to demonstrate the competitive advantages of Cadence hardware platforms.
  • Technical Presentation: Create and deliver impactful technical presentations, white papers, and product demonstrations for existing and prospective customers.
What You’ll Need
  • BS with a minimum of 10 years of experience or MS with a minimum of 7 years of experience
  • Strong fundamentals in digital design, computer architecture, and system‑level verification
  • Have deep technical knowledge in a few of; Simulation (Advanced Testbench), Emulation (TBA & ICE) & FPGA Prototyping
  • Experience with hardware description languages (SystemVerilog/Verilog) and/or C/C++
  • Understanding of standard interconnect or IO protocols used in modern chip designs
  • Good debugging skills using waveforms, logs, and protocol analyzers
  • Ability to work across hardware and software boundaries.
  • Excellent communication, and interpersonal skills, ability to work in an international environment

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Additional Jobs (https://cadence.wd1.myworkdayjobs.com/addl_jobs)

Equal Employment Opportunity Policy:

Cadence is committed to equal employment opportunity throughout all levels of the organization.

  • Read the policy(opens in a new tab) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/equal-employment-opportunity-policy.pdf)

We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com.

Privacy Policy:

Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (https://www.cadence.com/en_US/home/privacy/privacy-policy.html) .

E-Verify

Cadence participates in the

E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/e-verify-participation-poster.pdf)

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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