Senior Power IC Architect & Silicon Lead

Navitas Semiconductor; San Jose (CA); On-site; USD 180,000 - 280,000; Full time

Benefits offered by this job

Health benefits

Unlimited PTO

Stock awards

Job summary

Navitas Semiconductor is seeking a seasoned analog/power IC design engineer to own architecture, design, and silicon execution of next‑generation PMICs. This hands‑on role requires end‑to‑end ownership from concept through production, collaborating with systems, device, layout, and validation teams.

You will drive architectural choices for AC‑DC, DC‑DC, and related topologies, mentor junior designers, and ensure manufacturability and yield in high‑volume production.

Qualifications

• Experience as chip lead or technical owner on silicon programs.
• Strong track record delivering power ICs from concept to high‑volume production.
• Proficiency with EDA tooling and DFT methodologies.

Responsibilities

• Lead architecture, design, and verification of PMICs from transistor level to full integration.

Skills

Chip lead

Power IC design

Analog/mixed-signal design

Technical ownership

Communication skills

Education

MSEE + 7+ years or PhD + 5+ years in analog or mixed-signal IC design

Degree in Electrical Engineering, Materials Science, Applied Physics

Tools

Cadence Virtuoso / Spectre

Post‑parasitic extraction tools

Monte Carlo and corner analysis

Job description

Navitas Semiconductor is seeking a seasoned analog/power IC design engineer to own architecture, design, and silicon execution of next‑generation PMICs. This hands‑on role requires end‑to‑end ownership from concept through production, collaborating with systems, device, layout, and validation teams.

You will drive architectural choices for AC‑DC, DC‑DC, and related topologies, mentor junior designers, and ensure manufacturability and yield in high‑volume production.