Analog/Mixed-Signal IC Design Lead (PMIC)

Celera Semiconductor; San Francisco (CA); On-site; USD 130,000 - 170,000; Full time

Job summary

Celera Semiconductor is seeking a Design Lead in San Francisco, California to spearhead the design and development of high-performance PMIC products. In this role, you'll lead a multidisciplinary team through the full IC development lifecycle, from defining chip architectures to overseeing silicon debug. The ideal candidate will have a PhD or Master’s in Electrical Engineering and over 10 years of IC design experience, with expertise in analog/mixed-signal blocks and industry-standard EDA tools.

Qualifications

• 10+ years of IC design experience with PMIC products.
• Proven track record in releasing products into high-volume manufacturing.
• Strong understanding of BCD process technologies.

Responsibilities

• Direct and participate in the full IC development lifecycle.
• Define system-level architectures and write detailed specifications.
• Lead full-chip integration and top-level simulations.

Skills

Technical Leadership

Cross-Functional Collaboration

Silicon Debug & Characterization

Education

Bachelor’s, Master’s, or PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

Verilog-AMS

SystemVerilog

Job description

As the Design Lead, you will spearhead the design and development of high-performance PMIC products. You will lead a multidisciplinary team to define chip architectures, oversee mixed-signal implementation, and ensure successful tape-outs that meet aggressive performance and schedule targets.

Key Responsibilities

• Technical Leadership: Direct and participate in the full IC development lifecycle, including research, design, and evaluation of PMIC products.
• Architecture & Specification: Define system-level architectures and write detailed specifications for analog and mixed-signal blocks such as LDOs, Buck/Boost converters, and Battery Management systems.
• Design & Verification: Lead full-chip integration and top-level simulations; drive verification strategies to ensure design completeness across all process corners.
• Cross-Functional Collaboration: Partner with Digital Design, Verification, Layout, and Test Engineering teams to resolve complex trade-offs between power, area, and performance.
• Silicon Debug & Characterization: Lead post-silicon validation, bench correlation, and root-cause analysis during debug phases to ensure production readiness.

Required Qualifications

• Education: Bachelor’s, Master’s, or PhD in Electrical Engineering with a focus on power electronics or microelectronics.
• Experience: 10+ years of relevant IC design experience, with a proven track record of releasing multiple PMIC products into high-volume manufacturing.
• Technical Expertise: Expertise in analog/mixed-signal blocks: Bandgaps, OP‑Amps, high-efficiency switching regulators, and data converters (ADC/DAC); proficiency with industry‑standard EDA tools (Cadence Virtuoso, Spectre) and modeling languages (Verilog‑AMS, SystemVerilog).
• Process Knowledge: Good understanding of BCD process technologies; strong grasp of semiconductor device physics and design for EMI/EMC and ESD protection.

Preferred Skills

• Familiarity with digital control architectures and industry-standard protocols.