Senior Power IC Architect — High-Efficiency PMICs

Analog Devices, Inc.; Chandler (AZ); On-site; USD 120,000 - 160,000; Full time

Job summary

Analog Devices, Inc. is seeking a Principal Power IC Design Engineer in Chandler, Arizona. In this role, you'll drive system-level architecture decisions for high-performance power management integrated circuits, working across teams to ensure successful project delivery.

The ideal candidate will possess a Master's degree in Electrical Engineering or a PhD with extensive experience in transistor-level power design and have proven collaboration skills in a technical environment.

Qualifications

• 10+ years of power IC design experience or PhD with 8+ years.
• Proven expertise in transistor-level design of power management circuits.
• Deep understanding of BCD, HV-CMOS, and power FET process technologies.

Responsibilities

• Lead system-level architecture of power management ICs.
• Drive architecture decisions and lead projects from concept through validation.
• Oversee physical implementation of power blocks.

Skills

Power IC design

Transistor-level design

Efficiency optimization

Cadence IC design suite

Control loop design

Education

MSEE or PhD

Tools

Cadence Virtuoso

Job description

Analog Devices, Inc. is seeking a Principal Power IC Design Engineer in Chandler, Arizona. In this role, you'll drive system-level architecture decisions for high-performance power management integrated circuits, working across teams to ensure successful project delivery.

The ideal candidate will possess a Master's degree in Electrical Engineering or a PhD with extensive experience in transistor-level power design and have proven collaboration skills in a technical environment.