Principal Power IC Design Engineer

Analog Devices, Inc.; Chandler (AZ); On-site; USD 120,000 - 160,000; Full time

Job summary

Analog Devices, Inc. is seeking a Principal Power IC Design Engineer in Chandler, Arizona. In this role, you'll drive system-level architecture decisions for high-performance power management integrated circuits, working across teams to ensure successful project delivery.

The ideal candidate will possess a Master's degree in Electrical Engineering or a PhD with extensive experience in transistor-level power design and have proven collaboration skills in a technical environment.

Qualifications

• 10+ years of power IC design experience or PhD with 8+ years.
• Proven expertise in transistor-level design of power management circuits.
• Deep understanding of BCD, HV-CMOS, and power FET process technologies.

Responsibilities

• Lead system-level architecture of power management ICs.
• Drive architecture decisions and lead projects from concept through validation.
• Oversee physical implementation of power blocks.

Skills

Power IC design

Transistor-level design

Efficiency optimization

Cadence IC design suite

Control loop design

Education

MSEE or PhD

Tools

Cadence Virtuoso

Job description

## Principal Power IC Design EngineerApplylocations: US, AZ, Chandler, East Elliotposted on: Posted Todayjob requisition id: R263413**About Analog Devices**Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.**About the Role**As a Principal Power IC Design Engineer, you will serve as a technical authority in the design and development of high-performance power management integrated circuits. You will drive architecture decisions and lead projects from concept through silicon validation, making critical technical tradeoffs across power conversion efficiency, thermal performance, and system integration. Your work will span multiple business units and directly shape semiconductor process development alongside the teams building ADI's next-generation power technologies.**Key Responsibilities**• Define and lead system-level architecture of power management ICs, including DC-DC converters (buck, boost, buck-boost), LDOs, charge pumps, gate drivers, power stages, and protection circuits • Architect and design high-performance power circuit blocks at the transistor level, optimizing for efficiency, transient response, and thermal performance • Lead architecture and design reviews, assessing trade-offs across efficiency, area, EMI, reliability, and cost • Influence design flows, IP reuse strategies, and product roadmaps across multiple projects • Drive parasitic-aware simulation, power-stage optimization, and design centering across process corners and operating conditions • Oversee physical implementation of power blocks, ensuring layout meets electrical, thermal, and manufacturability targets**Required Skills and Experience**• MSEE with 10+ years of power IC design experience, or PhD with 8+ years (BSEE with equivalent depth considered) • Proven expertise in transistor-level design of high-performance power management circuits • Track record of leading power IC designs from concept through tape-out, silicon validation, and production release • Deep understanding of BCD, HV-CMOS, and power FET process technologies, including high-voltage device physics and safe operating area constraints • Proficiency with Cadence IC design suite: Virtuoso, Spectre/APS, and power-stage simulation environments • Experience with control loop design, compensation techniques, and stability analysis for switching and linear regulators • Excellent presentation, technical writing, and communication skills Preferred Qualifications • Experience leveraging AI/ML techniques to enhance design automation, optimization, or modeling workflows • Experience with magnetics modeling, inductor/transformer co-design, and system-level power delivery network analysis • Knowledge of thermal analysis, package-level power dissipation modeling, and EMI/EMC mitigation techniques • Strong analytical and problem-solving abilities • Ability to work effectively in a collaborative team environment Technical Scope • Full-chip and subsystem-level power IC architecture ownership from specification through silicon bring-up • Efficiency optimization, loss analysis, and thermal management across switching and linear power conversion topologies • Reliability assessment including electromigration, hot-carrier injection, and high-voltage stress effects on power devices • Design-for-manufacturing and yield optimization through Monte Carlo analysis and statistical design centering Collaboration and Impact • Partner with product definition, applications, and marketing teams to translate customer needs into design specifications • Evaluate new process capabilities and identify opportunities for circuit innovation • Contribute to organizational knowledge through design reviews and cross-team technical forums*For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.**Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.**EEO is the Law: Notice of Applicant Rights Under the Law.*Job Req Type: ExperiencedRequired Travel: NoShift Type: 1st Shift/Days