Senior Post-Silicon Validation Lead (Code & QA)

Sapsf; United States; On-site; USD 140,000 - 210,000; Full time

Job summary

Sapsf is seeking a Senior Technical Lead for Post Silicon Validation in the United States. You will guide complex projects, shape validation strategies, and mentor the development team to deliver high-quality silicon verification.

You will conduct design reviews, establish QA procedures, optimize performance, and collaborate with stakeholders to define scope, milestones, and risk mitigation for on-time delivery.

Required: strong C/C++, Python, and semiconductor testing experience.

Qualifications

• Strong understanding of post silicon validation techniques.
• Proficiency in C and C++ for validation purposes.
• Solid knowledge of Python scripting for automation and tool development.
• Familiarity with performance optimization techniques and QA practices in semiconductor testing.

Responsibilities

• Provide technical guidance and implement best practices in post silicon validation processes, enhancing team capabilities and productivity.
• Conduct comprehensive code reviews and establish QA procedures while optimizing performance and ensuring adherence to coding standards for successful project delivery.
• Ensure compliance with processes in the assigned modules and act as a consultant for feasibility studies, technical alternatives, and risk assessments.
• Collaborate with stakeholders to define project scope, objectives, and deliverables, and prepare status reports to mitigate risks and ensure timely project completion.

Skills

Post Silicon Validation

C/C++

Python scripting

QA & optimization

Job description

Sapsf is seeking a Senior Technical Lead for Post Silicon Validation in the United States. You will guide complex projects, shape validation strategies, and mentor the development team to deliver high-quality silicon verification.

You will conduct design reviews, establish QA procedures, optimize performance, and collaborate with stakeholders to define scope, milestones, and risk mitigation for on-time delivery.

Required: strong C/C++, Python, and semiconductor testing experience.