Senior SoC Validation Lead - Silicon Platform & Python

Sapsf; United States; On-site; USD 140,000 - 200,000; Full time

Job summary

Sapsf is seeking an experienced Senior Technical Lead to drive end-to-end Silicon Platform Validation for SoCs, covering both pre-silicon and post-silicon phases.

You will develop test strategies for IP subsystems (Clock, Reset, Ethernet, I/O) and lead RTL debugging, emulation prototyping, and production validation across platforms.

The role emphasizes collaboration with design, firmware, and platform teams, with hands-on Python scripting to automate tests and log analysis.

Qualifications

• BS/MS/PhD in Electrical/Electronic Engineering or related field.
• 4–10+ years in SoC validation (pre/post-silicon).
• Deep understanding of SoC architecture and IP integration.

Responsibilities

• Develop verification and validation plans for SoC-level IP subsystems.
• Create and execute directed and constrained-random tests for IP integration.
• Verify CDC, reset sequencing, and POR behavior across platforms.
• Validate Ethernet data path, MII/RGMII/SGMII interfaces, and link negotiation.
• Perform functional coverage analysis and drive coverage closure.
• Debug RTL, work with design/architecture teams on specs and RTL issues.
• Execute validation on emulation/FPGA platforms for early software integration.
• Bring up and validate SoC IPs on first silicon and platform boards.
• Develop post-silicon test plans for Clock, Reset, Ethernet, and I/O.
• Develop and maintain automated test frameworks for regression.

Skills

SoC validation

Test strategy development

RTL debugging

Python scripting

Emulation/prototyping

Post-silicon test planning

Root-cause analysis

Mentoring

Education

B.S./M.S./Ph.D. in Electrical Engineering or related field

Tools

Palladium

Veloce

Protium

Oscilloscopes

Logic analyzers

Job description

Sapsf is seeking an experienced Senior Technical Lead to drive end-to-end Silicon Platform Validation for SoCs, covering both pre-silicon and post-silicon phases.

You will develop test strategies for IP subsystems (Clock, Reset, Ethernet, I/O) and lead RTL debugging, emulation prototyping, and production validation across platforms.

The role emphasizes collaboration with design, firmware, and platform teams, with hands-on Python scripting to automate tests and log analysis.