Senior ASIC Post-Silicon DFT Lead

Cisco; San Jose (CA); On-site; USD 178,000 - 257,000; Full time

Job summary

Cisco’s Silicon One team seeks a senior ASIC post-silicon DFT Lead to shape post-silicon bring-up and production readiness. You’ll coordinate across post-silicon engineering, reliability, board and system groups to define DFT requirements early in design and drive quality through production.

You will influence next‑generation networking chips and advance DFT methodologies across the full development cycle, from design to ramp into high‑volume manufacturing.

Qualifications

• Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 12 years of experience.
• Prior experience in post-silicon validation, hardware bring-up, Yield/reliability learnings, ramp acceleration, FA efficiency, and production scalability
• Prior experience working with DFT team & post-silicon validation from initial bringup to high volume production
• Prior experience working with Gate level simulation, debugging with VCS and other simulators.
• Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687

Responsibilities

• Lead post-silicon bringup to production roadmap and drive DFT requirements early in the design cycle.
• Collaborate with post silicon product engineering, Reliability, Board, package, functional test, and system teams.
• Craft groundbreaking next generation networking chips.
• Help lead to drive the post-silicon process and quality process through the entire production phase from DFT design side.

Skills

Post-silicon validation

DFT

Hardware bring-up

Gate level simulation

VCS

Education

Bachelor's or Master’s in Electrical or Computer Engineering

Tools

VCS

P1687

Job description

Cisco’s Silicon One team seeks a senior ASIC post-silicon DFT Lead to shape post-silicon bring-up and production readiness. You’ll coordinate across post-silicon engineering, reliability, board and system groups to define DFT requirements early in design and drive quality through production.

You will influence next‑generation networking chips and advance DFT methodologies across the full development cycle, from design to ramp into high‑volume manufacturing.