Senior Physical Verification Engineer – A&D LVS/DRC Expert

Intel

Santa Clara (CA)

On-site

USD 128,880 - 245,160

Full time

14 days+
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Benefits offered by this job

Competitive pay
Stock bonuses
Health benefits
Retirement plans
Professional development

Job summary

Intel in Santa Clara is seeking a Senior Physical Verification Application Engineer. In this role, you will provide specialized technical support for layout verification and parasitic extraction, ensuring successful customer implementations.

The position requires strong experience with advanced CMOS processes and EDA tools. Applicants must be US citizens and able to obtain security clearance, contributing to national security through semiconductor verification solutions.

Qualifications

  • US Citizenship required.
  • Ability to obtain a US Government Security Clearance.
  • 3+ years experience with advanced CMOS processes (22nm and below).
  • 3+ years in layout verification and parasitic extraction EDA tools.
  • 3+ years experience in scripting languages (Python, Perl, Tcl, etc.).

Responsibilities

  • Provide comprehensive technical support on layout verification.
  • Create documentation and deliver training presentations.
  • Lead optimization of physical verification flows.
  • Deliver customer-facing technical support on verification issues.

Skills

Analytical problem-solving
Effective communication
Technical leadership

Education

Bachelor's degree in Electrical/Computer Engineering or STEM

Tools

EDA tools (LVS, DRC, ERC, PERC)
Parasitic extraction tools (StarRC, Quantus, xACT)

Job description

Intel in Santa Clara is seeking a Senior Physical Verification Application Engineer. In this role, you will provide specialized technical support for layout verification and parasitic extraction, ensuring successful customer implementations.

The position requires strong experience with advanced CMOS processes and EDA tools. Applicants must be US citizens and able to obtain security clearance, contributing to national security through semiconductor verification solutions.

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