Senior PCIe SoC Verification Engineer – AI Chiplets

Tenstorrent; Boston (MA); Hybrid; USD 100,000 - 500,000; Full time

Benefits offered by this job

Competitive compensation package

Equal opportunity employer

Job summary

Tenstorrent in Boston, MA seeks a Senior SoC Design Verification Engineer to lead pre-silicon PCIe verification for advanced AI SoCs. You will own verification environments and drive coverage across link training, enumeration, and power management.

The role emphasizes expert PCIe/UVM skills, Gen4/Gen5 familiarity, and automation, with a hybrid work model in Boston. Candidates at various seniority levels are considered, with compensation aligned to level.

Qualifications

• Deep PCIe architecture and subsystem verification experience.
• Expert in UVM and PCIe controller verification.
• Familiar with Gen4/Gen5 features, compliance concepts, and automation.
• Proactive, detail-oriented, cross-functional collaboration.

Responsibilities

• Develop and own verification environments for PCIe logic in AI chiplets/SoCs.
• Write, refine, and run test scenarios for link training, enumeration, power mgmt.
• Analyze coverage, debug failures, collaborate with architecture/RTL/system teams.
• Automate PCIe protocol testing and interoperability validation.

Skills

PCIe architecture

UVM verification

PCIe Gen4/Gen5

LTSSM verification

verification automation

CocoTB familiarity

Tools

CocoTB

Job description

Tenstorrent in Boston, MA seeks a Senior SoC Design Verification Engineer to lead pre-silicon PCIe verification for advanced AI SoCs. You will own verification environments and drive coverage across link training, enumeration, and power management.

The role emphasizes expert PCIe/UVM skills, Gen4/Gen5 familiarity, and automation, with a hybrid work model in Boston. Candidates at various seniority levels are considered, with compensation aligned to level.